Foundry 2.0 – the New Path Forward for Moore’s Law
May 11, 2025
NHanced Semiconductor president Robert Patti’s presentation at the recent SEMIEXPO Heartland in Indianapolis, IN described the critical role of advanced packaging in continuing the progress of Moore’s Law in semiconductor development. Following is a summary of his presentation.
In Gordon Moore’s seminal paper, he predicted a ‘Day of Reckoning’ for semiconductor scaling. That day has arrived. However, as predicted, there is another path forward for semiconductors to continue progress without relying solely on ever-shrinking devices. Advanced packaging is that new path, and it is at the heart of a new industry model known as Foundry 2.0.
To read the full article, click here
Related Chiplet
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
Related Blogs
- Chiplet Summit 2024: Opportunities, Challenges, and the Path Forward for Chiplets
- The Chiplet Center of Excellence sets new standards for the automotive industry
- 2026 Chiplet Summit: Interconnect is the New Frontier of System Performance
- Wafer-Scale vs. Chiplets: The new war? - Part 2: Two Paths, One Wall
Latest Blogs
- The Bottleneck Isn’t Compute. It’s Getting the Chip Built!
- How Intel Foundry Packaging Technologies Redefine AI and HPC Scalability Limits at ECTC 2026
- From complexity to simplicity: Scaling and future-proofing chiplets with AMBA®︎ CHI C2C property negotiation
- High-Speed Heterogeneous Integration with Multiphysics Analysis for TSMC SoW-X
- Chiplet Realization Beyond the Package: Why the Next AI Bottleneck Moves to the Interposer-to-PCB Boundary