Enabling heterogenous integration (HI) through material design

By Pradeep Chakraborty

October 28, 2024

By Pradeep Chakraborty, Pradeep’s TechPoints (October 28, 2024)

Heterogeneous integration (HI) has come a long way in 50 years. Multi-chip modules (MCMs) have given way to an ecosystem of chiplets, 3D stacked die, and co-packaging of antenna, high-bandwidth memory (HBM), and optics. HI is at center of “More than Moore” development activities, as innovative engineers look for creative ways to overcome slower scaling of silicon technology.

Promise of HI is new devices with superior power, performance, area, and cost (PPAC). All these promises come with new challenges. Managing different process nodes, physical characteristics, mechanical stresses, and other system-level challenges not found in monolithic system-on-chip (SoC) devices, creates a great opportunity for design and manufacturing companies to reshape the global semiconductor industry.

We have demands placed on devices by new applications. New tools are needed to meet these demands. We placed challenges on materials and equipment suppliers to develop processes capable of manufacturing individual components and integrating them into final products.

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