Accelerating Early-Stage explorations with Virtual Prototyping for a thriving multi-vendor chiplet ecosystem
The multi-die and chiplet revolution is underway led by large and small semiconductor vendors. Markets are diversifying and use cases are proliferating. Innovations in packaging enables 10x more die area vs monolithic reticle limited dies. The next evolution is multi-vendor chiplet ecosystems that address a broader set of offerings to strategic market segments via collaboration, innovation, and agility, while delivering both technical and business value.
One critical catalyst to drive above growth is to accelerate engagements at the earliest stages of the design cycle — the virtual prototyping phase. A larger number of higher quality architectural interoperability explorations will lead to more projects advancing into implementation phases thereby building more vibrant revenue-generating ecosystems.
Key challenges today:
- Identifying specific dies/chiplets for architectural interoperability evaluation that are unlisted or buried in silos.
- Variability in exploration practices and tools causing delays and inefficiencies.
- Low-confidence value estimations methodology making investments difficult
Open framework chiplet virtual prototyping
The objectives are 3-fold:
- Develop repositories populated with chiplet models by disparate vendors
- Publish list of interoperable chiplets based on stated testing criteria
- A design framework that leverages and builds the above on an existing environment.
Together they widen the top of the funnel and speed up identification of compatible chiplets for next stages of the design cycle. This lowers risk with lower effort, better design-fits, faster time to revenue, higher ASP/margin, and lower NRE.
Benefits to participants and industry overall:
- Faster and early identification of architectural interoperable designs for system feasibility – accelerate time to revenue, reuse, and better product fit.
- Monetize your IP over multiple designs in a larger eco-system.
- Enables early-stage testing of 3rd party chiplets for architectural compatibility, reducing expensive, later-stage changes.
- Expand the pool of die/chiplet options; build automation for higher productivity and faster time to best-fit.
- Facilitates knowledge pooling and best practices, improving productivity and efficiency.
- Support reference designs aligned to vertical use cases showcase the art of the possible.
- Establishes well-understood methodologies for estimating business and technical value early in the design cycle, allowing faster decision making.
- Identify gaps in offerings that can be addressed for revenue.
- More business opportunities and “hot leads” for participants, customers, and industry in general.
Large companies have mature internal tribal knowledge and methodologies giving them an advantage to develop multi-die offerings. Smaller and mid-sized organizations need an open framework to collaborate and level the playing field.
Why OCP and OCE?
Open chiplet economy (OCE) project under Open Compute Project (OCP) is a vendor-neutral body encouraging participation from commercial, research labs, and academia who benefit from this initiative. OCP / OCE can amplify this effort through summits, newsletters, webinars, and more to build more visibility for participants.
Next Steps: Stakeholder Engagement
Visit Call for participation (CFP) at https://www.opencompute.org/events/upcoming-events/cfp-open-framework-for-chiplet-eco-system-virtual-prototyping. You can shape the strategy and get a head start on the business and technical side.
More details of the proposed draft open framework for multi-vendor/multi-die virtual prototyping in part 2 of the blog series coming soon.
Send your comments and interest to participate to virtual.proto@ocproject.net.
Resources and Call-to-action:
-
Open systems for AI workshop: https://www.opencompute.org/events/past-events/ocp-aiml-it-infrastructure-silicon-workshop
- Deck: https://drive.google.com/file/d/1lsUX4Autk-Xt35zycQ1250fMhkJapbfX/view?usp=drive_link
- Video Virtual chiplet prototyping starts at min 34:00: https://www.youtube.com/watch?v=Pg82RjT84nU
- Attend OCP Global Summit session “Accelerating Early-Stage Exploration with Virtual Prototyping for a Flourishing Multi-Vendor Chiplet Economy” , Wed, October 15, 2025 in San Jose, CA https://2025ocpglobal.fnvirtual.app/a/schedule/
Related Chiplet
- Interconnect Chiplet
- 12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- Bridglets
- Automotive AI Accelerator
- Direct Chiplet Interface
Related Blogs
- Podcast: How Achronix is Enabling Multi-Die Design and a Chiplet Ecosystem with Nick Ilyadis
- Arm Ecosystem Collaborates on Standards to Enable a Thriving Chiplet Market
- Arm Ecosystem Collaborates on Standards to Enable a Thriving Chiplet Market
- Samsung Foundry Partners with Arm, ADTechnology and Rebellions to Develop an Innovative AI CPU Chiplet Platform Ideal for Modern AI Datacenters
Latest Blogs
- Let’s Get Serious: TeraPHY™ Optical Engine Passes the Test for AI Scale-Up at Volume
- Accelerating Early-Stage explorations with Virtual Prototyping for a thriving multi-vendor chiplet ecosystem
- Arteris’ Multi-Die Solution for the RISC-V Ecosystem
- A Beginner’s Guide to Chiplets: 8 Best Practices for Multi-Die Designs
- Case Study: How to Sign Off Your UCIe Interface