Eliyan Showcases Next-Generation Chiplet Interconnect and Memory Innovations at OCP Global Summit 2025

Interconnect pioneer showcases industry’s most high-performance, power efficient interconnect solutions; presents advances in scalable chiplet architectures for the GenAI era; and highlights key technical contributions to BoW 2.1

Santa Clara, Calif., October 14, 2025 — Eliyan Corporation, credited for the invention of the semiconductor industry’s highest-performance and most efficient chiplet interconnect, today announced its participation in the upcoming Open Compute Project (OCP) Global Summit, taking place October 15-17, 2025, in San Jose, California. Eliyan will present new advances in chiplet interconnect and memory interface design, showcase live demonstrations in the Innovation Village, and highlight its leadership in the development of BoW (Bunch of Wires) 2.1 enhancements to enable next-generation, high-bandwidth, energy-efficient computing architectures.

Thought Leadership at OCP: Two Key Presentations

  • 3:35 p.m. – Ramin Farjadrad, “Smashing Memory & I/O Limits: Architectures for the GenAI Era”
    Company founder and noted interconnect specialist Farjadrad will present Eliyan’s latest system-level architectures that overcome today’s fundamental memory and I/O bottlenecks. These include:
    • Custom HBM implementations on FinFET base dies for unprecedented bandwidth density and memory scalability.
    • Die-to-Die and Chip-to-Chip architectures that expand system interconnect bandwidth and power efficiency, enabling flexible, manufacturable GenAI systems built with open, chiplet-based architectures.
  • 9:00 a.m. – Kevin Donnelly, “BoW 2.1 Enhancements for New Applications”
    Donnelly, a leading contributor to OCP’s BoW interconnect standard, will present the newly published BoW Memory Addendum — a major extension to the BoW 2.0 PHY Specification that enables more efficient die-to-die connections between ASICs and memory devices. The new specification supports dynamic bidirectional signaling and ECC options, dramatically improving bandwidth and energy efficiency while reducing the “Memory Wall” that limits system performance.

Live Demos in the Innovation Village

Eliyan will exhibit in the OCP Innovation Village, featuring two high-performance demonstrations that push the limits of chiplet interconnect technology:

  • New SF4X Advanced Packaging UCIe 32Gbps demo based on the Samsung SF4X process– highlighting Eliyan’s high-speed implementation in advanced packaging.
  • N3P 64Gbps SBD demo demonstrating the industry’s highest-performing chiplet interconnect PHY in the TSMC 3nm process technology and highlighting the company’s unique simultaneous bidirectional (SBD) interface approach.

These demos showcase Eliyan’s continuing leadership in enabling practical, high-volume manufacturing of advanced chiplet architectures for AI and HPC applications.

Advancing Open Standards for the Chiplet Economy

Eliyan’s ongoing work within OCP includes major contributions to the newly announced BoW Memory Addendum, which defines optional enhancements for connecting ASICs directly to memory devices through BoW interfaces. This innovation allows designers to achieve higher performance and power efficiency for memory-intensive workloads such as AI training and inference. (link to OCP blog)

“We’re proud to collaborate with OCP to advance open standards that accelerate the chiplet ecosystem,” said Farjadrad, Eliyan’s CEO and Co-Founder. “Our BoW Memory Addendum contributions address the most pressing system challenge of the AI era – bridging the Memory and I/O Walls – to enable the next wave of performance scaling in an open, interoperable way.”

About Eliyan

Eliyan Corporation is leading the chiplet revolution, focusing on a fundamental challenge with scaling semiconductor performance, size, power, and cost to meet the needs of high-performance computing applications. It has developed a breakthrough technology to enable the industry’s highest performing chiplet interconnect for homogenous and heterogenous multi-die architectures using either standard or advanced packaging, enabling increased sustainability through reduction in costs, manufacturing waste and power consumption.  More information can be found here: www.eliyan.com