Spying Across Chiplets: Side-Channel Attacks in 2.5/3D Integrated Systems
By Giorgio Di Natale 1, Christelle Rabache 1, Pierre-Louis Hellier 1, Florence Podevin 1, Sylvain Bourdel 1, Romain Siragusa 2, Paolo Maistri 1
1 Univ. Grenoble Alpes, CNRS, Grenoble INP, TIMA, Grenoble, France
2 Univ. Grenoble Alpes, Grenoble INP, LCIS, Valence, France

Abstract
Advanced packaging and chiplet-based integration are increasingly adopted to build complex heterogeneous systems beyond the limits of monolithic scaling. While these architectures offer major benefits in terms of modularity, yield, and performance, they also introduce new physical attack surfaces. In this paper, we show that side-channel attacks can be mounted across chiplets within the same package or stack. Our key idea is that a communication-oriented chiplet, originally intended to interact with the external environment through an antenna, an RFID-like element, or another contactless coupling structure, can be repurposed as an internal observation platform. We formalize this threat through a realistic adversary model, describe the corresponding attack principle, and experimentally assess its feasibility. The obtained results demonstrate that signals captured through such a communication-oriented interface can reveal information correlated with the activity of a neighboring victim chiplet.
To read the full article, click here
Related Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
- Interconnect Chiplet
Related Technical Papers
- What’s Next for Multi-Die Systems in 2024?
- The Next Frontier in Semiconductor Innovation: Chiplets and the Rise of 3D-ICs
- Codesign of quantum error-correcting codes and modular chiplets in the presence of defects
- NoCs and the transition to multi-die systems using chiplets
Latest Technical Papers
- Modeling, Optimizing and Exploring Multi-Die FPGA Routing Architectures
- A 32 Gb/s 0.41 pJ/bit Single-Ended Transmitter with TX-Based-Only Adaptive Crosstalk Cancellation for Ultra-Short-Reach Wireline Applications
- Transient Multiscale Workflow for Thermal Analysis of 3DHI Chip Stack
- Dispersion-Engineered Terahertz Silicon Interconnects Enabling Terabit-Scale Data Links
- Design-Oriented Modeling of TSV Substrate Noise Coupling to Ring VCOs