Executive Outlook: Chiplets, 3D-ICs, and AI
Trouble spots, and some solutions, for the next wave of high-performance semiconductors.
By Ed Sperling, Semi Engineering | May 29, 2025
Semiconductor Engineering sat down to discuss chiplets and the challenges of moving to 3D-ICs with Bill Mullen, Ansys fellow; John Ferguson, senior director of product management at Siemens EDA; Chris Mueth, senior director of new markets and strategic initiatives at Keysight; Albert Zeng, senior engineering group director at Cadence; Anand Thiruvengadam, senior director and head of AI product management at Synopsys. What follows are excerpts of that discussion, which was held in front of a live audience at ESD Alliance 2025.
To read the full article, click here
Related Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
- Interconnect Chiplet
Related News
- AI and Chiplets Prominent at TSMC OIP 2025
- DreamBig Semiconductor Announces Partnership with Samsung Foundry to Launch Chiplets for World Leading MARS Chiplet Platform on 4nm FinFET Process Technology Featuring 3D HBM Integration to Solve Scale-up and Scale-out Limitations of AI for the Masses
- Why UCIe is Key to Connectivity for Next-Gen AI Chiplets
- Intel moves to chiplets for automotive AI
Latest News
- CoAsia SEMI Commences Supply of 3D IC SoCs: Korea’s First Case, Positioning 3D IC as the Next HBM
- Eliyan Secures $50 Million in Strategic Investments from Leading Hyperscalers and AI Infrastructure Providers to Accelerate Scalable AI Systems
- Veeco and imec develop 300mm compatible process to enable integration of barium titanate on silicon photonics
- Lightmatter Introduces Guide Light Engine for AI, Featuring VLSP Technology
- Lightmatter and GUC Partner to Produce Co-Packaged Optics (CPO) Solutions for AI Hyperscalers