Die-to-die Interconnect Standards In Flux
Many features of UCIe 2.0 seen as “heavy” are optional, causing confusion.
By Bryon Moyer, SemiEngineering | May 15, 2025
UCIe, a standard for die-to-die interconnect in advanced packages, has drawn concern about being too heavyweight with its 2.0 release. But the fact that many of the new features are optional seems to have been lost in much of the public discussion.
In fact, new capabilities that support a possible future chiplet marketplace are not required for designs that don’t target that marketplace.
“It’s the blessing and the curse of UCIe,” said Mick Posner, senior product marketing group director at Cadence. “The spec is defined with so many variants that you can tailor it to your exact needs. It’s applicable for everything from automotive to high-performance compute to AI to mil/aero because it has so many flavors. That’s also a curse to an IP provider. How do you support all those flavors?”
To read the full article, click here
Related Chiplet
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
Related News
- Keysight Expands Chiplet Interconnect Standards Support in Chiplet PHY Designer 2025
- Chiplet Pioneer Eliyan Joins UCIe and JEDEC Industry Standardization Organizations, Expands Veteran Leadership Team to Accelerate Adoption of Breakthrough Die-to-Die Interconnect Solution
- Marvell Demonstrates Silicon Photonics Light Engine for Low-power, Rack-scale Interconnect in AI Networks
- BOS Joins VESA and UCIe to Advance Global Standards in Display and Chiplet Technology
Latest News
- Point2 Completes $136M Series B Funding with Arm, LB Investment, and Maverick Silicon
- Multibeam Appoints Interim CFO Following $200M Funding Milestone
- Multibeam Signs $140 Million Letter of Intent with the U.S. Department of Commerce
- Credo to Contribute OmniConnect Scale-In Interconnect Solution to the Open Compute Project to Address AI Inference Memory Wall
- Silicon Box Ships 500M Units at High Yield, Expands Production Capacity for Panel-Level Packaging