Chiplets diary: Three anecdotes recount design progress

By Majeed Ahmad, EDN (February 2, 2024)

By The chiplet design movement representing multi-billion-dollar market potential is marching ahead with key building blocks falling in place while being taped out at advanced process nodes like TSMC’s 3 nm. These multi-die packaging devices can now mix and match pre-built or customized compute, memory, and I/O ingredients in different process nodes, paving the way for system-in-packages (SiPs) to become the system motherboard of the future.

Chiplets also promise considerable cost reduction and improved yields compared to traditional system-on-chip (SoC) designs. Transparency Market Research forecasts the chiplet market to reach more than $47 billion by 2031, becoming one of the fastest-growing segments of the semiconductor industry at more than 40% CAGR from 2021 to 2031.

Below are a few anecdotes demonstrating how chiplet-enabled silicon platforms are making strides in areas such as packaging, memory bandwidth, and application-optimized IP subsystems.

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