Bringing Tiny Chiplets To Embedded SoCs
By Sally Ward-Foxton, EETimes (October 31, 2023)
LONDON — ZeroASIC has developed a technology platform to bring chiplets to embedded system design, as a time-efficient alternative to designing and manufacturing custom application-specific ICs (ASICs). The platform is based on swappable pre-fabbed 2 x 2 mm chiplets on an active silicon interposer, which customers can design for themselves in a matter of minutes using ZeroASIC’s online EDA tool.
The company’s aim is to reduce the barrier to making custom ASICs versus using off-the-shelf SoCs. ZeroASIC CEO Andreas Olofsson told EE Times that the biggest cost, in terms of both time and money, for custom ASICs is tapeouts.
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