On chip voltage regulator IP for chiplets and SoCs
By Nick Flaherty, eeNews Europe (June 20, 2024)
Movellus has launched dynamic voltage regulator IP to provider more control of complex system on chip devices and chiplets.
Aeonic Power builds on the clock and sensing telemetry IP to provide granular control of voltage via regulators across different blocks. This will help to reduce power consumption and the thermal envelope, but can also address aging issues.
“We have moved from clocking to sensors, and this year we are coming out with power, they are all interrelated and build the infrastructure around the logic for an SoC,” Vikram Karvat, chief operating officer at Movellus tells eeNews Europe.
To read the full article, click here
Related Chiplet
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
Related News
- Alphawave Semi Taped-Out Industry Leading 64Gbps UCIe™ IP on TSMC 3nm for the IP Ecosystem, Unleashing Next Generation of AI Chiplet Connectivity
- Alphawave Semi Delivers Cutting-Edge UCIe™ Chiplet IP on TSMC 3DFabric® Platform
- Sarcina Launches UCIe-A/S Packaging IP to Accelerate Chiplet Architectures
- The Future of Chip Integration: Fraunhofer IPMS Develops High-Density Chiplet Systems at the Wafer Level
Latest News
- CEA-Leti Pushes Stacking Roadmap as AI Runs Into Memory and Power Limits
- Department of Commerce Announces Letters of Intent With 7 Companies for $874 Million to Accelerate Semiconductor R&D for the Compute Supply Chain
- Micross to Acquire AEMtec, Significantly Expanding European Footprint in Advanced Packaging and Optoelectronics
- Eliyan Achieves Unicorn Status with $145 Million Series C to Advance Electro-optical Interconnects for AI Infrastructure
- GlobalFoundries signs letter of intent with the U.S. Department of Commerce for a $300 million award to accelerate U.S. silicon photonics leadership