Axelera plans AI chiplets for automotive
By Nick Flaherty, eeNews Automotive (January 10, 2024)
Dutch edge AI chip designer Axelera is planning a version of its in memory computing AI architecture for automotive chiplets.
“We are already part of the imec chiplet consortium and a EU consortium to standardise RISC-V in AI acceleration,” said Fabrizio del Maffeo, CEO and co-funder of Axelera AI in the Netherlands tells eeNews Europe Automotive.
Belgian research lab imec pulled together a group to develop chiplet technology for automotive that includes European car makers.
To read the full article, click here
Related Chiplet
- eFPGA Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
Related News
- TIER IV joins imec’s Automotive Chiplet Program to accelerate chiplet-based architectures and AI accelerators for SDVs
- EdgeCortix Looks To Chiplets For Third-Gen Reconfigurable AI Chip
- Renesas moves to chiplets for automotive processors
- ASIC platform targets automotive chiplets
Latest News
- SILITH and UMC Achieve Mass Production Milestone for Silicon Photonics
- As AI Moves from Training to Inference, Optics Moves Closer to the Chip
- Arteris Announces Collaboration with IC-Link by imec to Accelerate Next-Gen AI and HPC Silicon
- Asahi Kasei Adds New Slitting Facility for SUNFORT™ to Meet Growing Demand for Advanced Semiconductor Packaging
- ACCM Introduces Celeritas SMC: A Production-Ready, Silicon-Matched Core for Advanced Packaging