Axelera plans AI chiplets for automotive
By Nick Flaherty, eeNews Automotive (January 10, 2024)
Dutch edge AI chip designer Axelera is planning a version of its in memory computing AI architecture for automotive chiplets.
“We are already part of the imec chiplet consortium and a EU consortium to standardise RISC-V in AI acceleration,” said Fabrizio del Maffeo, CEO and co-funder of Axelera AI in the Netherlands tells eeNews Europe Automotive.
Belgian research lab imec pulled together a group to develop chiplet technology for automotive that includes European car makers.
To read the full article, click here
Related Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
- Interconnect Chiplet
Related News
- Intel moves to chiplets for automotive AI
- Cadence Accelerates SoC, 3D-IC and Chiplet Design for AI Data Centers, Automotive and Connectivity in Collaboration with Samsung Foundry
- TIER IV joins imec’s Automotive Chiplet Program to accelerate chiplet-based architectures and AI accelerators for SDVs
- Renesas moves to chiplets for automotive processors
Latest News
- Avicena Launches the World’s First microLED Optical Interconnect Evaluation Kit for AI Infrastructure Innovators
- Lightmatter Achieves Record 1.6 Tbps Per Fiber to Accelerate AI Optical Interconnect
- Arm Positions Neoverse for AI and Telco Networks at MWC
- NVIDIA Compute Architecture Paves the Way for Scale-Up Optical Interconnects; CPO Penetration in AI Data Centers Expected to Rise Steadily
- CEA-Leti and NcodiN Partner to Industrialize 300 mm Silicon Photonics for Bandwidth-Hungry AI Interconnects