Advancing 3D-IC for next-gen electronics
Advancing 3D-IC for next-gen electronics was presented by Dan Kochpatcharin, Head of Ecosystem and Alliance Management Division, TSMC, at the SimEDGE 2024.
Everyone wants faster speeds, higher density, more bandwidth, advanced packaging, more memory, and more compute. TSMC has 3D Si packaging. TSMC-SoW (system-on-wafer) is dies on wafer.
TSMC CoWoS enables most demanding compute. We had N16 SoC in 2016. Advanced 3D stacking SoIC integrated in 2.5D CoWoS powers next-gen AI compute. Nine-reticle CoWoS features SoIC and 12 HBMs is targeted for 2027. We have 150+ accumulated customer product tape-outs by end of 2024.
New challenges for SI in thermal and stress are system scaling induces power, thermal, stress, and warpage challenges. We collaborate with EDA partners on new tools to meet CoWoS scaling design needs.
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