China forms its own chiplet standard amid isolation
By Peter Clarke, eeNews Analog (March 27, 2023)
The China Chiplet Industry Alliance has released the ‘Chiplet Interconnection Interface Standard’ known as ACC1.0, according to the Financial Association Press.
The standard defines a high-speed serial port and is focused on optimization based on the domestic packaging and substrate supply chain, with cost and commercial practicality as a key consideration, the report said. The standard was developed by the Cross Information Core Technology Research Institute working with the China Chiplet Industry Alliance, which includes domestic system, IP, and packaging manufacturers.
Related Chiplet
- Direct Chiplet Interface
- HBM3e Advanced-packaging chiplet for all workloads
- UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
- UCIe based 8-bit 48-Gsps Transceiver
- UCIe based 12-bit 12-Gsps Transceiver
Related News
- Keysight Introduces Chiplet PHY Designer for Simulating D2D to D2D PHY IP Supporting the UCIe™ Standard
- Eliyan Sets New Standard for Chiplet Interconnect Performance with Latest PHY Delivering Data Rate of 64Gbps on 3nm Process Using Standard Packaging
- Eliyan Breaks Chiplet Memory Wall With Standard Packaging
- Chiplet Standard Goes 3D
Latest News
- CHIPS for America Announces up to $300 million in Funding to Boost U.S. Semiconductor Packaging
- Scintil Photonics names Matt Crowley as CEO, founder Sylvie Menezo will continue heading technology developments and customer partnerships
- TSMC drives A16, 3D process technology
- Eliyan Ports Industry’s Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- GlobalFoundries and U.S. Department of Commerce Announce Award Agreement on CHIPS Act Funding for Essential Chip Manufacturing