Nvidia, TSMC, and advanced packaging realignment in 2025
By Majeed Ahmad, EDN (January 20, 2025)

Nvidia’s CEO Jensen Huang has made waves by saying that his company’s most advanced artificial intelligence (AI) chip, Blackwell, will transition from CowoS-S to CoWoS-L advanced packaging technology. That also shows how TSMC’s advanced packaging technology—chip on wafer on substrate (CoWoS)—is evolving to overcome interconnect battles inside large, powerful chips for AI and other high-performance computing (HPC) applications.
The CoWoS-S advanced packaging technology uses a single silicon interposer and through-silicon vias (TSVs) to facilitate the direct transmission of high-speed electrical signals between the die and the substrate. However, single silicon interposers often confront yield issues.
To read the full article, click here
Related Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
- Interconnect Chiplet
Related News
- After TSMC fab in Japan, advanced packaging facility is next
- Amkor and TSMC to Expand Partnership and Collaborate on Advanced Packaging in Arizona
- Lorentz Solution Jointly Presents with NVIDIA on Large-Scale 3D Terahertz EM Simulation for Real IC/3DIC Silicon Case Studies in Photonic Switches at 2025 TSMC OIP
- NVIDIA Reportedly Overwhelms TSMC with 3 and 4-Nanometer Orders
Latest News
- Xanadu and Tower Semiconductor Deepen Strategic Collaboration to Accelerate Photonic Quantum Hardware Innovation
- EV Group Unveils Next-Generation EVG®120 Resist Processing System for High-Volume Manufacturing
- CEA Demonstrates First Dynamically Routed Electro-Optical Router for Photonic Interposers
- Renesas Develops SoC Technologies for Automotive Multi-Domain ECUs Essential for the SDV Era
- Keysight Unveils 3D Interconnect Designer for Chiplet and 3DIC Advanced Package Designs