Chiplet Summit to Focus on New Packages and AI Applications in 2025
Chiplets Increase Performance and Lower Cost
SAN DIEGO -- July 25, 2024 -- Chiplet Summit announces its third annual event on January 21-23 at the Santa Clara Convention Center. The 2025 meeting focuses on a new level in chip design: system-in-package (SiP). SiPs use advanced packaging to raise performance and reduce time-to-market. Co-optimization methods allow all design stages to proceed together. The event also covers supercomputer-in-a-package, a low-cost way to support generative AI.
The Summit features major vendor keynotes, expert tables, and technology and market updates. It also offers sessions on the open chiplet economy, die-to-die interfaces, and working with foundries. Designers will learn to develop leading-edge chips at low cost. An exhibit area will showcase the latest products.
“Chiplets help designers use the latest process nodes and packaging methods. They also allow faster updates and revisions,” said Chuck Sobey, Summit General Chair. He noted, “Specialists in all aspects of chip development will meet to ensure successful projects.”
About Chiplet Summit
Chiplet Summit, a product of Semper Technologies, showcases the emerging chiplet market. It features the people who are using chiplets in designs for processors, communications chips, and AI devices.
Related Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
- Interconnect Chiplet
Related News
- Credo to Exhibit at Chiplet Summit 2025
- Eliyan Showcases Next-Generation Chiplet Interconnect and Memory Innovations at OCP Global Summit 2025
- Pre-Registration Opens for Chiplet Summit
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
Latest News
- CoAsia SEMI Commences Supply of 3D IC SoCs: Korea’s First Case, Positioning 3D IC as the Next HBM
- Eliyan Secures $50 Million in Strategic Investments from Leading Hyperscalers and AI Infrastructure Providers to Accelerate Scalable AI Systems
- Veeco and imec develop 300mm compatible process to enable integration of barium titanate on silicon photonics
- Lightmatter Introduces Guide Light Engine for AI, Featuring VLSP Technology
- Lightmatter and GUC Partner to Produce Co-Packaged Optics (CPO) Solutions for AI Hyperscalers