Chiplet Marketplace

Chiplet Marketplace is the world's most comprehensive Chiplet resource with over 200 Chiplets from 20 vendors and foundries

Highlights

Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity

Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity

Silicon Box welcomes European Commission approval of €1.3 billion Italian State aid measure to support new advanced packaging facility in Novara

Silicon Box welcomes European Commission approval of €1.3 billion Italian State aid measure to support new advanced packaging facility in Novara

Cadence Rolls Out System Chiplet to Reorganize the SoC

Cadence Rolls Out System Chiplet to Reorganize the SoC

Fraunhofer IAF expands technology capabilities for chiplet innovations within the APECS pilot line

Fraunhofer IAF expands technology capabilities for chiplet innovations within the APECS pilot line

New Chiplet

Direct Chiplet Interface

This device will enable CrossFire customers that have integrated DCI connectivity into their Chiplets to connect to Chiplets equipped with the standard high power, low density UCIe interface.

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Rebellions

HBM3e Advanced-packaging chiplet for all workloads

Scalable AI, fortified with high compute density and ample memory bandwidth

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Ayar Labs

High-Density Electronic-Photonic Chiplet

Parallel electrical interface
Supports AIB and other proprietary parallel interfaces
8 full-duplex optical ports

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UCIe AP based 8-bit 170-Gsps Chiplet Transceiver

2T2R chiplet configuration
160/175-GSa/s sample rate
7-bit resolution

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NEXT Semiconductor Technologies

UCIe based 8-bit 48-Gsps Transceiver

48-Gsps peak sample rate
8 bit resolution
UCIe SP (16x lanes at 16Gbps) with streaming controller

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NEXT Semiconductor Technologies

UCIe based 12-bit 12-Gsps Transceiver

12-Gsps peak sample rate
12 bit resolution (programmable)
UCIe SP (16x lanes at 16Gbps) with streaming controller

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YorChip

PCIe Gen 5 Chiplet

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Enosemi

Parallel Single Mode (PSM) 16-channel 112 Gbps Transmitter Chiplet

16x DR4 specification compliant transmit channels including modulator and driver
Digital SPI control interface

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Zero ASIC Corporation

Active silicon interposer

Network-On-Interposer
4 Tbps aggregate bisection bandwidth

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YorChip

Quad Core RISC-V with AI Chiplet

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Ranovus

100G optical I/O chiplets

RANOVUS®’ Odin® optical I/O cores set industry benchmarks for high bandwidth, low power consumption and small size for AI, cloud, metaverse, and communications applications

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Memory Chiplet

Stealth Mode Products design to disrupt AI/Generative AI processing.

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Looking for an IP Core today?

Serdes IP USB4 PHY

PCI Express 4.1 IP RISC-V IP

TSMC 3nm IP NPU IP

Featured News

Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity

2024-12-20T09:07:00+01:00

Silicon Box welcomes European Commission approval of €1.3 billion Italian State aid measure to support new advanced packaging facility in Novara

2024-12-19T18:55:00+01:00

Cadence Rolls Out System Chiplet to Reorganize the SoC

2024-12-19T09:02:00+01:00

Fraunhofer IAF expands technology capabilities for chiplet innovations within the APECS pilot line

2024-12-19T08:30:00+01:00

Lightmatter Joins UALink™ Consortium to Propel AI Interconnect into the Photonic Era

2024-12-18T15:15:00+01:00

Recent News

Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity

2024-12-20T09:07:00+01:00

Silicon Box welcomes European Commission approval of €1.3 billion Italian State aid measure to support new advanced packaging facility in Novara

2024-12-19T18:55:00+01:00

Fraunhofer IMS Takes a Key Role in Establishing the APECS Pilot Line

2024-12-19T15:48:00+01:00

EdgeCortix Joins AI-RAN Alliance to Accelerate the Integration of AI and Next-gen RAN Infrastructure

2024-12-19T10:02:00+01:00

Cadence Rolls Out System Chiplet to Reorganize the SoC

2024-12-19T09:02:00+01:00

Fraunhofer IAF expands technology capabilities for chiplet innovations within the APECS pilot line

2024-12-19T08:30:00+01:00

Lightmatter Joins UALink™ Consortium to Propel AI Interconnect into the Photonic Era

2024-12-18T15:15:00+01:00

YES RapidCure Systems chosen by SkyWater Technology for Fan Out Wafer Level Packaging

2024-12-18T09:08:00+01:00

Report: SK Hynix mulls offering advance packaging foundry service

2024-12-17T09:11:00+01:00

European Chiplet Innovation: APECS Pilot Line starts Operation in the Framework of the EU Chips Act

2024-12-16T17:15:00+01:00

The keeper of Moore’s Law

2024-12-15T07:27:00+01:00

Chiplet Interconnects Add Power And Signal Integrity Issues

2024-12-12T10:58:00+01:00

BOS and Tenstorrent Unveil Eagle-N, Industry’s First Automotive AI Accelerator Chiplet SoC

2024-12-12T07:59:00+01:00

Ayar Labs, with Investments from AMD, Intel Capital, and NVIDIA, Secures $155 million to Address Urgent Need for Scalable, Cost-Effective AI Infrastructure

2024-12-11T17:17:00+01:00

Marvell Announces Breakthrough Custom HBM Compute Architecture to Optimize Cloud AI Accelerators

2024-12-11T08:11:00+01:00

Testing For Thermal Issues Becomes More Difficult

2024-12-10T13:03:00+01:00

Broadcom Delivers Industry’s First 3.5D F2F Technology for AI XPUs

2024-12-10T06:00:00+01:00

Imec achieves seamless InP Chiplet integration on 300mm RF Silicon Interposer with excellent performance at 140GHz

2024-12-09T13:15:00+01:00

The Role of Chiplets in Redefining Semiconductor Design

2024-12-06T14:45:00+01:00

Biden-Harris Administration Announces CHIPS Incentives Awards with Absolics and Entegris to Support Development of Advanced Packaging Technology and Onshore Materials for Leading-Edge Chip Production

2024-12-06T13:26:00+01:00

YorChip and Digitho developing breakthrough 2D Chiplet Packaging for Mass Markets

2024-12-05T15:27:00+01:00

Catching Up on The Latest in Advanced Packaging at SEMICON Europa 2024

2024-12-04T16:53:00+01:00

Arm Aims to Democratize Chiplets

2024-12-04T07:25:00+01:00

Arteris Deployed by Menta for Edge AI Chiplet Platform

2024-12-03T15:09:00+01:00

IP players prominent in chiplet’s 2024 diary

2024-12-03T08:24:00+01:00

Intel Announces Retirement of CEO Pat Gelsinger

2024-12-02T15:15:00+01:00

Rebellions and SAPEON Korea Complete Merger, Launching Korea’s First AI Chip Unicorn

2024-12-02T07:47:00+01:00

MZ Technologies unveils roadmap for its integrated chiplet/packaging Co-Design EDA tool

2024-11-28T12:55:00+01:00

Top-Down Vs. Bottom-Up Chiplet Design

2024-11-26T13:07:00+01:00

Alphawave Semi Drives Innovation in Hyperscale AI Accelerators with Advanced I/O Chiplet for Rebellions Inc

2024-11-26T08:35:00+01:00

More news

Technical Papers

Automakers And Industry Need Specific, Extremely Robust, Heterogeneously Integrated Chiplet Solutions

By Andy Heinig, Fraunhofer IIS

December 12, 2024

Efficient ESD Verification For 2.5/3D Automotive ICs

By Dina Medhat, Siemens EDA

December 9, 2024

Heterogeneous Integration Technologies for Artificial Intelligence Applications

By Madison Manley, Georgia Institute of Technology

December 4, 2024

Performance Implications of Multi-Chiplet Neural Processing Units on Autonomous Driving Perception

By Mohanad Odema, University of California

December 3, 2024