Direct Chiplet Interface
- This device will enable CrossFire customers that have integrated DCI connectivity into their Chiplets to connect to Chiplets equipped with the standard high power, low density UCIe interface.
Chiplet Marketplace
Chiplet Marketplace is the world's most comprehensive Chiplet resource with over 200 Chiplets from 20 vendors and foundries
New Chiplet
HBM3e Advanced-packaging chiplet for all workloads
- Scalable AI, fortified with high compute density and ample memory bandwidth
High-Density Electronic-Photonic Chiplet
- Parallel electrical interface
- Supports AIB and other proprietary parallel interfaces
- 8 full-duplex optical ports
UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
- 2T2R chiplet configuration
- 160/175-GSa/s sample rate
- 7-bit resolution
UCIe based 8-bit 48-Gsps Transceiver
- 48-Gsps peak sample rate
- 8 bit resolution
- UCIe SP (16x lanes at 16Gbps) with streaming controller
UCIe based 12-bit 12-Gsps Transceiver
- 12-Gsps peak sample rate
- 12 bit resolution (programmable)
- UCIe SP (16x lanes at 16Gbps) with streaming controller
Parallel Single Mode (PSM) 16-channel 112 Gbps Transmitter Chiplet
- 16x DR4 specification compliant transmit channels including modulator and driver
- Digital SPI control interface
Active silicon interposer
- Network-On-Interposer
- 4 Tbps aggregate bisection bandwidth
100G optical I/O chiplets
- RANOVUS®’ Odin® optical I/O cores set industry benchmarks for high bandwidth, low power consumption and small size for AI, cloud, metaverse, and communications applications
Memory Chiplet
- Stealth Mode Products design to disrupt AI/Generative AI processing.
Featured News
Siemens delivers certified and automated design flows for TSMC 3DFabric technologies
2025-02-18T12:32:00+01:00
VeriSilicon: At present, the company's chiplet business is progressing smoothly
2025-02-17T16:09:00+01:00
New Memory Architectures for SoCs and Multi-Die Systems
2025-02-13T15:52:00+01:00
Signal Integrity Plays Increasingly Critical Role In Chiplet Design
2025-02-13T11:13:00+01:00
ERS electronic Unveils Production, R&D Facility, and Competence Center for Advanced Packaging in Germany
2025-02-10T09:12:00+01:00
Recent News
Business
EDGE and Lockheed Martin to Collaborate on Advanced Chiplet Design Capabilities
2025-02-18T16:52:00+01:00
EDA
Siemens delivers certified and automated design flows for TSMC 3DFabric technologies
2025-02-18T12:32:00+01:00
Research & Development
EU funding boosts Europe's semiconductor production – VTT develops packaging methods
2025-02-18T08:40:00+01:00
Advanced Packaging
ASE Expands its Chip Packaging and Testing Facility to Enable Next-Gen Applications
2025-02-18T07:38:00+01:00
Advanced Packaging
Adeia at WLPS 2025: Advancing Hybrid Bonding Metrology
2025-02-17T17:20:00+01:00
Commentary / Analysis
VeriSilicon: At present, the company's chiplet business is progressing smoothly
2025-02-17T16:09:00+01:00
Commentary / Analysis
New Memory Architectures for SoCs and Multi-Die Systems
2025-02-13T15:52:00+01:00
Commentary / Analysis
Signal Integrity Plays Increasingly Critical Role In Chiplet Design
2025-02-13T11:13:00+01:00
Business
ERS electronic Unveils Production, R&D Facility, and Competence Center for Advanced Packaging in Germany
2025-02-10T09:12:00+01:00
Business
LQDX and Arizona State University Sign Semiconductor Packaging Collaboration Agreement
2025-02-08T10:06:00+01:00
Commentary / Analysis
Why UCIe is Key to Connectivity for Next-Gen AI Chiplets
2025-02-06T16:39:00+01:00
Advanced Packaging
3M joins consortium to accelerate semiconductor technology in the US
2025-02-05T18:21:00+01:00
Commentary / Analysis
Commentary / Analysis
Chiplets: Where Are We Today?
2025-02-05T12:10:00+01:00
Other
Commentary / Analysis
Chip Architectures Becoming Much More Complex With Chiplets
2025-01-30T14:18:00+01:00
Commentary / Analysis
Chiplets Still A Challenge With UCIe 2.0
2025-01-30T13:58:00+01:00
Commentary / Analysis
Advanced Packaging Moving At Breakneck Pace
2025-01-29T13:09:00+01:00
Foundries
Commentary / Analysis
Automotive Chiplet Ecosystem Heralds Agility and Flexibility
2025-01-28T19:48:00+01:00
People
Celestial AI Announces Appointment of Semiconductor Industry Icon Lip-Bu Tan to Board of Directors
2025-01-28T18:13:00+01:00
Equipment
Business
Commentary / Analysis
Broadcom Bets on 3.5D Packaging Technology to Build Bigger AI Chips
2025-01-27T16:37:00+01:00
Commentary / Analysis
Arm’s Chiplet System Architecture eyes ecosystem sweet spot
2025-01-27T13:36:00+01:00
Commentary / Analysis
Nvidia, TSMC, and advanced packaging realignment in 2025
2025-01-27T09:35:00+01:00
Equipment
Business
Baya Systems Raises $36M+ to Propel AI and Chiplet Innovation
2025-01-23T16:07:00+01:00
Other
Chiplet
Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
2025-01-21T19:37:00+01:00
Technical Papers
Co-Optimization of Power Delivery Network Design for 3-D Heterogeneous Integration of RRAM-Based Compute In-Memory Accelerators
February 17, 2025
Exploring the Potential of Wireless-enabled Multi-Chip AI Accelerators
February 8, 2025
PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies
February 5, 2025
3D integration of pixel readout chips using Through-Silicon-Vias
January 22, 2025
Siemens delivers certified and automated design flows for TSMC 3DFabric technologies
2025-02-18T12:32:00+01:00
VeriSilicon: At present, the company's chiplet business is progressing smoothly
2025-02-17T16:09:00+01:00
New Memory Architectures for SoCs and Multi-Die Systems
2025-02-13T15:52:00+01:00
Signal Integrity Plays Increasingly Critical Role In Chiplet Design
2025-02-13T11:13:00+01:00
ERS electronic Unveils Production, R&D Facility, and Competence Center for Advanced Packaging in Germany
2025-02-10T09:12:00+01:00
Business
EDGE and Lockheed Martin to Collaborate on Advanced Chiplet Design Capabilities
2025-02-18T16:52:00+01:00
EDA
Siemens delivers certified and automated design flows for TSMC 3DFabric technologies
2025-02-18T12:32:00+01:00
Research & Development
EU funding boosts Europe's semiconductor production – VTT develops packaging methods
2025-02-18T08:40:00+01:00
Advanced Packaging
ASE Expands its Chip Packaging and Testing Facility to Enable Next-Gen Applications
2025-02-18T07:38:00+01:00
Advanced Packaging
Adeia at WLPS 2025: Advancing Hybrid Bonding Metrology
2025-02-17T17:20:00+01:00
Commentary / Analysis
VeriSilicon: At present, the company's chiplet business is progressing smoothly
2025-02-17T16:09:00+01:00
Commentary / Analysis
New Memory Architectures for SoCs and Multi-Die Systems
2025-02-13T15:52:00+01:00
Commentary / Analysis
Signal Integrity Plays Increasingly Critical Role In Chiplet Design
2025-02-13T11:13:00+01:00
Business
ERS electronic Unveils Production, R&D Facility, and Competence Center for Advanced Packaging in Germany
2025-02-10T09:12:00+01:00
Business
LQDX and Arizona State University Sign Semiconductor Packaging Collaboration Agreement
2025-02-08T10:06:00+01:00
Commentary / Analysis
Why UCIe is Key to Connectivity for Next-Gen AI Chiplets
2025-02-06T16:39:00+01:00
Advanced Packaging
3M joins consortium to accelerate semiconductor technology in the US
2025-02-05T18:21:00+01:00
Commentary / Analysis
Commentary / Analysis
Chiplets: Where Are We Today?
2025-02-05T12:10:00+01:00
Other
Commentary / Analysis
Chip Architectures Becoming Much More Complex With Chiplets
2025-01-30T14:18:00+01:00
Commentary / Analysis
Chiplets Still A Challenge With UCIe 2.0
2025-01-30T13:58:00+01:00
Commentary / Analysis
Advanced Packaging Moving At Breakneck Pace
2025-01-29T13:09:00+01:00
Foundries
Commentary / Analysis
Automotive Chiplet Ecosystem Heralds Agility and Flexibility
2025-01-28T19:48:00+01:00
People
Celestial AI Announces Appointment of Semiconductor Industry Icon Lip-Bu Tan to Board of Directors
2025-01-28T18:13:00+01:00
Equipment
Business
Commentary / Analysis
Broadcom Bets on 3.5D Packaging Technology to Build Bigger AI Chips
2025-01-27T16:37:00+01:00
Commentary / Analysis
Arm’s Chiplet System Architecture eyes ecosystem sweet spot
2025-01-27T13:36:00+01:00
Commentary / Analysis
Nvidia, TSMC, and advanced packaging realignment in 2025
2025-01-27T09:35:00+01:00
Equipment
Business
Baya Systems Raises $36M+ to Propel AI and Chiplet Innovation
2025-01-23T16:07:00+01:00
Other
Chiplet
Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
2025-01-21T19:37:00+01:00
Technical Papers
Co-Optimization of Power Delivery Network Design for 3-D Heterogeneous Integration of RRAM-Based Compute In-Memory Accelerators
February 17, 2025
Exploring the Potential of Wireless-enabled Multi-Chip AI Accelerators
February 8, 2025
PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies
February 5, 2025
3D integration of pixel readout chips using Through-Silicon-Vias
January 22, 2025