Expanding the Chiplet Market: Processing Any Wafer from Any Foundry
By Sylvie Joly, 3D InCites (July 30, 2024)
In response to the rising costs of advanced nodes and the slowdown of Moore’s Law, major vendors – AMD, Intel, Apple, and Samsung – are making the shift towards chiplet-based systems using 3D technologies, which create novel system partitioning through modular and scalable architectures. These solutions optimize bandwidth with respect to power consumption, contributing to the current energy-sober trend. The very short interconnects in chiplets also reduce data transfer latency. However, the unprecedented growth of artificial intelligence (AI) applications creates new and significant energy demands. Consequently, advanced packaging ecosystems are needed to deliver faster and more cost-effective systems with ever-greater functionality, performance, and power efficiency.
The Chiplet Market
By 2028, chiplets are projected to be almost ubiquitous in high-end data centers housing generative AI and computational processors (Figure 1), and needs are emerging in the consumer and automotive markets. For example, 3D integrations are already included in some high-end consumer products such as imagers (from Sony or STMicroelectronics), where they optimize the power, performance, area, and cost (PPAC) trade-off.
To read the full article, click here
Related Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
- Interconnect Chiplet
Related News
- European Chiplet Innovation: APECS Pilot Line starts Operation in the Framework of the EU Chips Act
- Fraunhofer IAF expands technology capabilities for chiplet innovations within the APECS pilot line
- Cadence Rolls Out System Chiplet to Reorganize the SoC
- Opportunities Unleashed by Chiplet Technology: A New Era for the Semiconductor Industry
Latest News
- Ayar Labs Closes $500M Series E, Accelerates Volume Production of Co-Packaged Optics
- NanoIC opens access to first-ever fine-pitch RDL and D2W hybrid bonding interconnect PDKs
- GUC Announces Tape-out of UCIe 64G IP on TSMC N3P Technology
- GLS and APES Announce Advanced Semiconductor Packaging Partnership
- Ayar Labs Names Sankara Venkateswaran as Vice President of Engineering