China forms its own chiplet standard amid isolation
By Peter Clarke, eeNews Analog (March 27, 2023)

The China Chiplet Industry Alliance has released the ‘Chiplet Interconnection Interface Standard’ known as ACC1.0, according to the Financial Association Press.
The standard defines a high-speed serial port and is focused on optimization based on the domestic packaging and substrate supply chain, with cost and commercial practicality as a key consideration, the report said. The standard was developed by the Cross Information Core Technology Research Institute working with the China Chiplet Industry Alliance, which includes domestic system, IP, and packaging manufacturers.
To read the full article, click here
Related Chiplet
- Optical Chiplet
- Reverse Gearbox Chiplet
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
- Ncore Multi-Die Interconnect IP
- Integrated voltage regulator (IVR) chiplet
Related News
- Tenstorrent Announces Open Chiplet Atlas™ Ecosystem to Accelerate and Standardize an Open Chiplet Ecosystem
- Cadence Accelerates SoC, 3D-IC and Chiplet Design for AI Data Centers, Automotive and Connectivity in Collaboration with Samsung Foundry
- BOS Joins VESA and UCIe to Advance Global Standards in Display and Chiplet Technology
- Chiplet Interfaces Embrace Failures
Latest News
- SCHMID Group Secures Key Wet-Process Equipment Order for South Asia’s First Glass Core Substrate Manufacturing Facility
- EV Group Helps Accelerate Qubit Scaling for Quantum Computing Through Advanced Packaging Expertise
- Paras Semiconductors Partners with US-based BroadPak Corporation to Build Advanced Semiconductor Packaging Capabilities in India
- Tower Semiconductor and Innolight Advance High-Performance Near-Package Optics for AI Infrastructure
- ACM Research Announces Shipment of Its First 310 × 310 mm Ultra ECP ap-p Panel-Level Horizontal Electroplating Production Tool