India’s OSAT-ATMP Build-Out: From Legacy Packages to 2.5D
By Yashasvini Razdan, EE Times | August 26, 2026

Hyderabad, India–based Advanced System in Package (ASIP) Technologies has begun construction of an outsourced semiconductor assembly and test (OSAT) facility in Visakhapatnam, Andhra Pradesh, with Korean partner APACT, targeting production within 18 months. The project is part of a broader Indian push that has led to the approval of nine semiconductor packaging projects under the India Semiconductor Mission 1.0 (ISM 1.0), a government program with a $10 billion outlay spanning memory assembly, legacy packaging, power devices, flip-chip, and early advanced packaging.
The Andhra Pradesh state government has approved the ASIP project at ₹2,500 crore (~$300 million at the time of approval). In an exclusive conversation with EE Times, ASIP Technologies CEO Venkata Simhadri said the plant will begin with flip-chip ball-grid array (BGA) and wire-bond packaging, with 2.5D packaging targeted for 2030.
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