The Chiplet Revolution
Reducing demands on a single chip by using smaller chips dedicated to specific functions.
When Mark Kuemerle, vice president of technology at semiconductor manufacturer Marvell, needed to familiarize some new engineering hires with one of the challenges facing their industry, he borrowed a bunch of LEGO blocks from his kids. He presented the group with a select number of mismatched blocks. The pieces, Kuemerle explained to his new initiates, were meant to represent different chips with particular functions.
Traditionally, all the critical components of a semiconductor have been packaged onto a single piece of silicon, an approach called homogeneous integration. The exercise Kuemerle proposed reflected a design strategy called heterogeneous integration, which pulls together different chips, known as chiplets, with their own specific functions. These chiplets can vary not only in terms of what they are designed to do, but also in their size and specifications. A memory chip might be relatively small, for example, and one designed for machine learning tasks much larger.
Related Chiplet
- UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
- UCIe based 8-bit 48-Gsps Transceiver
- UCIe based 12-bit 12-Gsps Transceiver
- 400G Transmitter Chiplet for 400G, 800G and 1.6T Pluggable Transceivers
- FPGA Chiplets with 40K -600K LUTS
Related Blogs
- The Chiplet Revolution
- UCIe and Automotive Electronics: Pioneering the Chiplet Revolution
- Silicon Creations is Enabling the Chiplet Revolution
- The Future of Chiplet Reliability
Latest Blogs
- Enabling heterogenous integration (HI) through material design
- Will 2025 Be the Year of the Chiplet?
- UMI: Extending Chiplet Interconnect Standards To Deal With The Memory Wall
- Using Voltus IC Power Integrity to Overcome 3D-IC Design Challenges
- Advancing Die-to-Die Connectivity: The Next-Generation UCIe IP Subsystem