Connectivity for AI Everywhere: The Role of Chiplets
By Tony Chan Carusone, CTO, Alphawave Semi
Chiplet technology is set to be a transformational paradigm. It offers compelling advantages in cost, time-to-market, and power consumption. AI has emerged as a primary catalyst for this trend because the only way to meet the accelerated demands of AI is by using chiplets. By combining dense logic, memory, and high-speed connectivity chiplets, new silicon systems tailored to specific workloads can be created without starting from scratch each time. As chiplet adoption increases, so do the bandwidth demands both within the package across die-to-die interfaces, and beyond the package. Low-latency inter-die communication is crucial for compute performance, and high-speed optical interconnects are vital for scaling AI clusters.
Related Chiplet
- Bridglets
- Automotive AI Accelerator
- Direct Chiplet Interface
- HBM3e Advanced-packaging chiplet for all workloads
- UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
Related Videos
- Chiplets for the future of AI
- TSMC 3Dblox™: Unleashing 3D IC Innovations for the Next Generation of AI, HPC, Mobile and IoT
- The future of AI: Chiplets & Lasers
- Photonic Fabric Interface Chiplets for AI XPU Optical Connectivity
Latest Videos
- 3D IC Podcast | The future of 3D ICs: How advanced packaging is changing the industry
- Mick Posner talks about the importance of UCIe
- Optimizing Chiplet architectures of RISC-V clusters, GPU and DNN using System-Level IP
- Speeding Up Die-To-Die Interconnectivity
- GENIOEVO™ – Architectural Exploration and Connectivity Management in Advanced Packaging