Xcelium Distributed Simulation App Accelerates Multi-Die Simulations Up to 3X

By Cadence Design Systems

July 11, 2025

The rise of AI and multi-die systems has pushed traditional simulation methods to their limits, making it harder to meet the computational demands of advanced chiplet-based designs. As part of Cadence's Xcelium Logic Simulator, the new Xcelium Distributed Simulation App offers a transformative solution that accelerates multi-die system simulations and eliminates verification bottlenecks. With simulation speeds up to 3X faster, it optimizes time and resources, empowering developers to efficiently verify designs for high-performance computing, AI, automotive, and mobile applications.

Xcelium Distributed Simulation App Delivers Faster Results and Lower Costs

Leveraging powerful multicore technology, the Xcelium Distributed Simulation App enables multiple partitions to operate as independent executables, enhancing simulation efficiency and optimization. This functionality allows design teams to break down large-scale simulations into smaller, independent tasks that can be processed simultaneously. By streamlining this process, the Xcelium Distributed Simulation App delivers results up to 3X faster than traditional methods, significantly cutting down on time and resource demands. Customers see substantial cost savings by optimizing workloads, particularly in high-capacity server environments, where expenses are reduced by up to 5X.

"Our mission at Cadence is to equip our clients with the most advanced tools to tackle the complexity of modern semiconductor designs," said Alok Jain, corporate vice president of research and development at Cadence. "With the Xcelium Distributed Simulation App, we're empowering teams to overcome verification challenges with unmatched speed and efficiency, setting a new standard for the industry."

Early adopters of the Xcelium Distributed Simulation App have tackled multi-die design scalability and time-to-market challenges through a shift-left approach, reusing single-die testbenches for multi-die verification. Garima Srivastava, director of chip design verification at Samsung Semiconductor, explains that "the pace of innovation in system-on-chip design demands scalable and efficient solutions. We closely collaborated with Cadence using the Xcelium Distributed Simulation App to significantly enhance our simulation performance for multi-die and multi-chip designs. With this tool, we can reuse single-die test environments, reducing time to market while maintaining performance standards."

Driving the Semiconductor Industry Forward

Cadence continues to lead the charge in semiconductor verification technology with its forward-thinking approach to multicore simulation. The continuous upgrades to the Xcelium Logic Simulator stand as a testament to the company's commitment to innovation, ensuring customers can meet the escalating demands of complex chip design with speed, efficiency, and reliability.

Visit the Cadence Xcelium Logic Simulator product page for more details about the simulator and its transformative capabilities.