Simplifying AI Chip Development: Arm and Synopsys Execs Discuss Chiplet, Subsystem, and IP Integration

By Frank Malloy

August 12, 2025

The explosive growth of AI-driven technologies is driving significant demand for newer, more powerful chips that can support their immense processing demands. But designing and developing these specialized chips is no easy feat.

That’s why Synopsys and Arm — longtime collaborators in simplifying chip design — are now focusing their combined expertise on AI chips and the multi-die architectures on which they are built.

Abhijeet Chakraborty, VP of engineering at Synopsys, and Eddie Ramirez, VP of marketing at Arm, sat down at Chiplet Summit 2025 to discuss the challenges engineering teams face when developing AI chips and how the two companies are working together to reduce design complexity, risk, and time to market.

“When it comes to AI, ensuring data quality and integrity is super important to all of our customers,” said Ramirez. “We’ve got to start from IP all the way up the stack to the system design and even to the software implementations.”

The two technology leaders have made significant progress in delivering optimized solutions that simplify and accelerate design cycles. But AI chips represent a new frontier with a multitude of challenges.

“We feel we are barely scratching the surface,” Chakraborty said. “And there’s a lot more work we can do in this space.”

Watch the video at https://players.brightcove.net/5748441669001/rka4xWwYG_default/index.html?videoId=6376391978112

AI chip design challenges

Chakraborty and Ramirez noted the multifaceted challenges that come with developing AI chips and the chiplets, subsystems, and multi-die designs that underpin them. Engineering teams must address and overcome several hurdles:

• Interconnect complexity. Integrating multiple chiplets requires high-speed, low-latency interconnects to ensure efficient data transfer between chiplets, which can be technically challenging to design and optimize.
• Power and thermal management. AI workloads are computationally intensive, and combining multiple chiplets in a single package can lead to significant power consumption and heat generation, making effective cooling and power distribution critical.
• Heterogeneous integration. AI chips often combine different types of chiplets (e.g., compute, memory, I/O), each potentially fabricated with different technologies or process nodes, which complicates integration and packaging.
• Yield and reliability. While chiplets can improve overall manufacturing yield, ensuring the reliability and long-term performance of the assembled, chiplet-based system remains a challenge.
• Design and verification complexity. The modular nature of multi-die architecture increases the complexity of design, verification, and testing, as interactions between chiplets must be thoroughly validated.
• Standardization and compatibility. The lack of universal standards for chiplet interfaces can hinder interoperability and limit the ability to mix and match chiplets from different vendors.
• Latency and bandwidth bottlenecks. Ensuring the communication between chiplets does not become a performance bottleneck is crucial, especially for AI workloads that require rapid data movement.

Many of these challenges stem from a lack of chiplet, subsystem, and IP integration. And that’s exactly what Synopsys and Arm are working to address.

“We’ve been working to get our compute subsystems [Arm CSS] to have Synopsys IP plug right in, particularly when it comes to designing custom AI chips,” Ramirez said. Pre-validation, he added, helps reduce complexity and risk and enables customers to accelerate their design timelines.

Chakraborty noted Synopsys — an active member of Arm Total Design — recently extended the industry’s leading virtual prototyping solution (Virtualizer) to the Arm ecosystem. He also highlighted the Arm-specific quick start implementation flows that have been developed using Fusion Compiler.

The flows, Chakraborty said, “are designed to help our mutual customers implement and develop Arm compute cores very efficiently.”

Left to right: Eddie Ramirez (Arm) and Abhijeet Chakraborty (Synopsys) at Chiplet Summit 2025

An expanding chiplet ecosystem

More integration, standardization, and collaboration — across an expanding chiplet ecosystem — will be necessary to further drive down the complexity, risk, and time associated with AI chip development. Chakraborty and Ramirez said Synopsys and Arm will continue to drive progress.

“I think when it comes to chiplets, we both play an important role in advancing the ecosystem,” Ramirez said.

Chakraborty agreed, noting the increased demand for interoperable solutions spanning chiplet architecture, platform, chassis, and interconnects. “There is so much investment in all aspects of the chiplet industry,” he said.

Additional efforts are needed, however, before an open chiplet ecosystem can be fully realized.

“We still have a lot of work to do,” Ramirez noted. “We’ll tackle things like security and RAS [reliability, availability, and serviceability] in multi-chip designs and systems.”

“Synopsys and Arm are leading the way in terms of technology development in these areas,” Chakraborty said. “I certainly look forward to our two companies continuing to work together in building out these ecosystems and delivering integrated solutions for our mutual customers.”

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