Interfacing silicon photonics for high-density co-packaged optics

By Geert Van Steenberge and Filippo Ferraro (imec)

In this article we focus on the optical interfacing challenges for high-density co-packaged optics (CPO) applications, where assembly yield and scalability are added to the well-known requirements of low-loss, broadband, and polarization-independent optical coupling. Although efficient fiber-edge coupling to lensed fibers has been demonstrated using tapered Si mode-size converters in the 220nm-thick crystalline Si layer of the silicon-on-insulator (SOI) platform, the tight alignment tolerance because of the small spot size at the optical interface, along with the need for an air gap for the lensed fibers to function, prevents large-scale adoption for high-throughput packaging.

To engineer the optical interface for an increased spot size, the most common approach today is to use the SiN layers commonly found in the back-end-of-line (BEOL) stack of a complementary metal-oxide semiconductor (CMOS) chip. An inverse SiN taper is employed to transition the large optical mode from flat-cleaved, industry-standard single-mode fibers (SMF), to the tightly-confined mode in Si nano-waveguides, without sacrificing the simplicity of BEOL integration.

Edge couplers based on a hybrid platform consisting of a Si photonic layer combined with an additional SiN photonic layer offer typical coupling efficiencies to SMF of -1.5dB/fiber for both transverse electric (TE) and transverse magnetic (TM) polarization in O- and C-bands [1]. A critical aspect to these efficient edge couplers is the removal of the substrate below the buried oxide (BOX) layer of the SOI wafer to prevent the expanded mode from leaking into the Si substrate. While this enables the integration of V-grooves for passive assembly of SMFs, it places a constraint on the optical I/O density.

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