Complex Heterogeneous Integration Drives Innovation In Semiconductor Test
By Jeorge Hurtarte, Teradyne
Advanced packaging and chiplets demand sophisticated and flexible test strategies.
Heterogeneous integration is driving innovation in the semiconductor industry, but it also introduces more complexity in chip design, which translates to more intricate test requirements. The automated test equipment (ATE) industry is responding, developing and utilizing more sophisticated test equipment capable of handling the diverse functionalities and interfaces needed to test heterogeneous chips. This includes testing for different communication protocols, power domains, and thermal characteristics – ultimately covering each set of integrated components with its own set of parameters and performance standards.
Heterogeneous integration at a glance
Heterogeneous chips, also known as heterogeneous integration, involve combining multiple, separately-manufactured components (e.g., processors, memory, sensors) into a single package or System in Package (SiP). The components combined in this way, known as chiplets, can be made using different processes and materials. A version of heterogeneous integration is shown in Figure 1.
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