Enabling an Open Chiplet Ecosystem with UCIe
UCIe™ (Universal Chiplet Interconnect Express™) is an open specification that defines the interconnect between chiplets within a package, enabling an open chiplet ecosystem and ubiquitous interconnect at the package level. The UCIe specification covers the die-to-die I/O physical layer, die-to-die protocols, and software stack, which leverage the well-established PCI Express® (PCIe®) and Compute Express Link® (CXL®) industry standards.
This presentation will introduce the new features in the UCIe 1.1 specification and explore how UCIe addresses customer requests for more customizable package-level integration, connecting best-in-class die-to-die interconnects and protocols from an interoperable, multi-vendor ecosystem.
Presented by Brian Rea, UCI Express and Richelle Ahlvers, SNIA
at the SNIA Compute, Memory, and Storage Summit
Related Chiplet
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
- Ncore Multi-Die Interconnect IP
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
Related Videos
- UCIe 2.0 Specification: Advancing an open ecosystem for on-package chiplet innovation
- Introducing the UCIe™ 3.0 Specification: Continued Innovations in the Open Chiplet Ecosystem
- The UCIe 1.1 Specification: Our Journey Toward Building an Open Ecosystem of Chiplets
- UCIe Based Chiplet Ecosystem Interoperable Testbench for Multi Vendor IP Integration
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