Signal Integrity Plays Increasingly Critical Role In Chiplet Design
Chiplet design engineers have complex new considerations compared to PCB concepts.
By Ann Mutschler, SemiEngineering (February 13th, 2025)
Maintaining the quality and reliability of electrical signals as they travel through interconnects is proving to be much more challenging with chiplets and advanced packaging than in monolithic SoCs and PCBs.
Signal integrity is a fundamental requirement for all chips and systems, but it becomes more difficult with chiplets due to reflections, loss, crosstalk, process variation, and various types of noise and physical effects. Electrical signals need to arrive at their destination at the right time, waveform shape, and with consistent voltage levels. This was hard enough in monolithic chips, but it takes on a whole new dimension in advanced packages.
To read the full article, click here
Related Chiplet
- Interconnect Chiplet
- 12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- Bridglets
- Automotive AI Accelerator
- Direct Chiplet Interface
Related News
- Chiplet Interconnects Add Power And Signal Integrity Issues
- Signal Integrity Designs at Organic Interposer CoWoS-R for HBM3-9.2Gbps High Speed Interconnection of 2.5D-IC Chiplets Integration
- Intel patents chiplet GPU design
- Cadence Unveils Arm-Based System Chiplet
Latest News
- CEA-Leti & STMicroelectronics’ Paper at IEDM 2025 Demonstrates Path to Fully Monolithic Silicon RF Front-Ends with 3D Sequential Integration
- Qualcomm Acquires Ventana Micro Systems, Deepening RISC-V CPU Expertise
- Imec mitigates thermal bottleneck in 3D HBM-on-GPU architectures using a system-technology co-optimization approach
- UMC Licenses imec’s iSiPP300 Technology to Extend Silicon Photonics Capabilities for Next-Generation Connectivity
- Geometry Challenges in Multidie Thermal Management