Advancing Europe’s Automotive Chiplet Vision: Arteris Joins CHASSIS to Accelerate Software-Defined Mobility
Arteris brings its leadership in network-on-chip (NoC) and multi-die interconnect innovation to CHASSIS (Chiplet-based Hardware Architectures for Software-Defined Vehicles), Europe’s first coordinated initiative aimed at creating an open automotive chiplet platform.
With the recent launch of CHASSIS, a three-year international research program to build an open, interoperable chiplet ecosystem for automotive applications, an important new chapter begins for software-defined mobility. Arteris is thrilled to help drive this milestone effort forward as a proud member of this 18-organization partnership spanning OEMs, semiconductor leaders, software innovators, EDA partners, and top research institutes.
Supported by the Chips Joint Undertaking and its members, CHASSIS represents more than a collaborative R&D program. It symbolizes Europe’s strategic commitment to remain at the forefront of shaping the next generation of vehicle compute architectures to be modular, scalable, secure, and chiplet-ready. It is a recognition that no single company can solve the complexity of software-defined vehicles alone.
"CHASSIS is a defining moment for our industry. By uniting Europe’s brightest engineering teams from companies such as Bosch, NXP, Arm and Arteris, we are laying the groundwork for a compute fabric that enables software-defined vehicles to evolve faster, integrate more safely, and scale more efficiently than ever before." Charles Janac, CEO of Arteris
A Transformational Step Toward Chiplet-Based Automotive Compute
As automotive electronics shift from distributed, fixed-function ECUs to centralized, high-performance computers designed for modularity and lifecycle upgradability, chiplets are rapidly emerging as a core enabler of this shift.
Where traditional monolithic SoCs struggle with cost, thermal constraints, and the integration of heterogeneous accelerators, chiplet-based systems provide:
- Modular scalability for diverse workloads
- Multi-vendor interoperability and architectural openness
- Faster innovation cycles for automotive compute
- Improved manufacturability and long-term reliability
- The ability to upgrade compute subsystems over a vehicle’s lifetime
In the automotive market safety certification, determinism, and precision integration are fundamental. Chiplets offer a path to both greater flexibility and higher assurance, as their modular structure allows for computing tasks on smaller, specialized chips to be combined as needed.
Where Arteris Technology Makes the Difference
As vehicles incorporate more AI/ML acceleration, sensor-fusion processing, domain controller consolidation, and mixed-criticality workloads, the complexity of on-chip and chiplet communication skyrockets.
For more than two decades, Arteris has delivered the interconnect technologies that underpin many of the world’s most advanced automotive and safety-critical SoCs. As the industry moves toward increasingly modular, scalable, and heterogeneous compute architectures, the strengths Arteris has built over years of innovation are more relevant than ever.
A Proven NoC Foundation for Modular Compute
Arteris NoC technology is trusted across generations of production silicon and provides structured, QoS-aware, and latency-predictable data movement. This foundation has long enabled architects to partition complex systems, balance performance and power, and scale designs as new features and workloads emerge. These same attributes naturally extend to modern modular compute platforms and chiplet-based architectures.
- Chiplet-Ready and Multi-Die Interconnect Expertise
As multi-die systems gain momentum, Arteris brings deep experience in high-bandwidth, low-latency communication across partitions, clusters, and domains. Our interconnect IP supports hierarchical design, robust clock and power domain handling, and flexible routing strategies, helping customers integrate diverse processing elements with confidence.
- Automation That Accelerates Integration and Improves Safety
Arteris SoC integration automation tools have long helped engineering teams reduce schedule risk by managing connectivity across large, complex designs. With automated configuration, documentation, and traceability, these tools support the rigor required for functional safety while enabling faster iteration and more predictable outcomes as systems grow in scale and architectural complexity.
- A Longstanding Commitment to Openness and Interoperability
Arteris has always championed design flexibility. Our protocol-agnostic architecture allows companies to integrate a wide range of IP, evolve their designs over time, and avoid vendor lock-in. This philosophy of openness has guided our technology roadmap for years, and it aligns strongly with the industry’s shift toward collaborative, multi-vendor compute ecosystems.
A Shared Vision for Software-Defined Mobility
The CHASSIS initiative is building not only the foundational technology, but also the frameworks required to scale chiplet adoption across Europe. Arteris recognizes that progress requires shared standards, open interfaces, and the ability for the entire ecosystem to innovate on top of a common foundation.
“For more than 11 years, Arteris has been enabling scalable, deterministic, and power-efficient data movement across the world’s most complex SoCs and multi-die designs,” Janac said. “The future of automotive compute will be defined not just by faster silicon, but by smarter connectivity. Interoperability, safety, security and scalability starting with the SoC and Chiplet interconnect. We are proud to contribute our expertise to the CHASSIS vision.”
A Collaborative Path Forward
CHASSIS partners span six countries and will collaborate across borders in a commitment to long-term regional resilience. By enabling companies to co-design next-generation compute platforms, the initiative reinforces Europe’s competitiveness and autonomy in semiconductor technologies.
The work ahead is significant, but the opportunity is even greater. Together with our CHASSIS partners, Arteris is helping shape the architectures that will power safe, smart, and sustainable mobility for decades to come.
Related Chiplet
- Interconnect Chiplet
- 12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- Bridglets
- Automotive AI Accelerator
- Direct Chiplet Interface
Related Blogs
- Marvell Joins Imec Automotive Chiplet Initiative to Facilitate Compute SoCs for Super-human Sensing
- 4 takeaways from the 2nd automotive chiplet conference
- Jumpstarting the Automotive Chiplet Ecosystem
- UCIe and Automotive Electronics: Pioneering the Chiplet Revolution
Latest Blogs
- Advancing Europe’s Automotive Chiplet Vision: Arteris Joins CHASSIS to Accelerate Software-Defined Mobility
- 3D-IC Market Outlook: Technology Roadmaps, Readiness, and Design Implications
- Cadence 3D-IC Success Stories: Faster Bandwidth, Lower Power, On-Time Tapeouts
- 3D-IC Test and Reliability: KGD Strategies, Access Architecture, & Failure Mode
- 3D-IC in AI, HPC, and 5G: Bandwidth, Latency, and Energy per Bit Advantages