TSMC drives A16, 3D process technology
By Nick Flaherty, eeNews Europe (November 20, 2024)
TSMC is looking to introduce its A16 1.6nm process by the end of 2026 with an IEEE standard for its 3Dblox technology.
The Open Innovation Platform (OIP) meeting in the Netherlands this week showed that the 2nm process will be in production in 2025 following early tapeouts this year, with a variant called N2P nanoFlex with the option for short standard cells for smaller area and greater power efficiency or tall cells for more performance.
This will give a 12% boost in energy efficiency over the base 2nm process, while A16 will give a 30% boost with the same density as N2 nanoFlex. Both TSMC and Intel are detailing their 2nm technologies at the IEDM conference in December.
To read the full article, click here
Related Chiplet
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
- Ncore Multi-Die Interconnect IP
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
Related News
- Cadence and TSMC Advance AI and 3D-IC Chip Design with Certified Design Solutions for TSMC’s A16 and N2P Process Technologies
- TSMC to Provide 3DIC Integration for AI Chips in 2027, Featuring 12 HBM4 and Chiplets Manufactured with A16
- Ansys Strengthens Collaboration with TSMC on Advanced Node Processes Certification and 3D-IC Multiphysics Design Solutions
- GUC Launches Next - Generation 2.5D/3D APT Platform Leveraging TSMC’s Latest 3DFabric® and Advanced Process Technologies
Latest News
- Global Electronics Association and Fraunhofer Group for Microelectronics Sign MoU to Support Advanced Packaging Industrial Adoption
- Silicon Box Ships 1 Billion Units, 2 Billion Year-End Production Target
- Applied Materials and Besi Expand Strategic Partnership to Advance Next-Generation Packaging for AI Scaling
- ficonTEC & HTSI Announce Strategic Cooperation to Scale Advanced CPO Test Solutions in Taiwan
- SignatureIP Unveils IP Library for Chiplet-based AI, HPC and Data Center Systems