Ayar Labs CEO: Optical Chiplets Coming to SOCs Soon
By Agam Shah, HPCwire (October 22, 2024)
In AI, time is money. Top AI players are spending billions to create computing infrastructures to satisfy that need for speed. However, these companies are bottlenecked by computing constraints at the chip, memory, and I/O levels, which are slowing down AI. In that regard, startup Ayar Labs is in the right place at the right time.
Ayar Labs has another solution: to replace electrical wires with pulses of light for complex chips and memory to communicate faster over short distances. That will improve the utilization of systems and result in more revenue and productivity.
Ayar Labs’ products are almost ready for prime time, and CEO Mark Wade sat down with HPCwire to discuss the company’s products and path forward.
To read the full article, click here
Related Chiplet
- Interconnect Chiplet
- 12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- Bridglets
- Automotive AI Accelerator
- Direct Chiplet Interface
Related News
- Ayar Labs Names Mark Wade CEO
- Ayar CEO: ‘Copper Is Already Broken; Agentic AI Will Require Optical I/O’
- Ayar Labs Showcases 4 Tbps Optically-enabled Intel FPGA at Supercomputing 2023
- Ayar Labs Adds Silicon Industry Veterans to Accelerate Growth
Latest News
- Where co-packaged optics (CPO) technology stands in 2026
- Qualcomm Completes Acquisition of Alphawave Semi
- Cadence Tapes Out UCIe IP Solution at 64G Speeds on TSMC N3P Technology
- Avnet ASIC and Bar-Ilan University Launch Innovation Center for Next Generation Chiplets
- SEMIFIVE Strengthens AI ASIC Market Position Through IPO “Targeting Global Markets with Advanced-nodes, Large-Die Designs, and 3D-IC Technologies”