RISC-V and Chiplets: A Panel Discussion

By Paul McLellan, SemiWiki

December 14, 2023

At the recent RISC-V Summit, the very last session was a panel about chiplets called Chiplets in the RISC-V Ecosystem. It was moderated by Calista Redmond, the CEO of RISC-V International. The panelists were:

• Laurent Moll, COO of Arteris
• Aniket Saha, VP of Product Management of Tenstorrent
• Dale Greenley, VP of Engineering of Ventana Microsystems
• Rob Aitken, Distinguished Architect of Synopsys

This is a slightly odd combination of topics to me. Obviously, you can put a RISC-V processor on a chiplet but the challenges are not really different from any other processor. But RISC-V is hot and so are chiplets, and companies like Ventana are combining them.

Let me give you a bit of background about the companies to put them in context:

• As you probably know, Arteris makes networks-on-chip (NoCs). It is a neutral company among chiplet vendors (and IP vendors).
• Tenstorrent is designing a portfolio of very high-performance multicore RISC-V chips
• Ventana has RISC-V IP but it also delivers it as chiplets
• Synopsys is obviously an EDA company but they announced RISC-V cores earlier in the summit

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