Serdes Chiplets

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3 Chiplet (1 - 3)

UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
- 2T2R chiplet configuration
- 160/175-GSa/s sample rate
- 7-bit resolution
112G per Lane SerDes
- Organic Substrate of Fan-Out MCM, and 2.5D Silicon Interposer - Ideal for 25.6Tbps Switch Fabric ASIC
56G per Lane SerDes
- 2.5D Silicon Interposer - Ideal for 12.8Tbps Switch Fabric ASIC