Chiplet-Ready IP Directory

All Chiplet-Ready IP Companies

Discover IP designed to become standalone chiplets, qualified using clear readiness criteria from concept to silicon-proven.

A chiplet-ready IP is an IP designed, packaged, and specified to be integrated as a standalone die in a multi-die system.

Not all IP can become a chiplet. Chiplet-ready IP requires system-level assumptions, physical accountability, and die-to-die interfaces.

This directory grows alongside the chiplet ecosystem.
New chiplet profiles are added as vendors reach sufficient technical and integration readiness.

Chiplet vendors: submit your product profile when your solution becomes chiplet-ready.

New Chiplet-Ready IPs

eFPGA Chiplet

  • Optimized Performance for Advanced Computing
  • Reduced Development Risk and Faster Time-to-Market
  • MOSAICS-Ready Chiplet Architecture
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High Performance Droplet

  • High-Performance Analog Front-Ends (AFEs): Essential for data acquisition and signal processing in various applications.
  • High-Speed Interfaces: Facilitating seamless communication between solutions. Omni Design supports various standards, including JESD204 and PCIe.
  • Custom Solutions: Omni Design can tailor SoC solutions to meet specific customer requirements.
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100G optical I/O chiplets

  • RANOVUS®’ Odin® optical I/O cores set industry benchmarks for high bandwidth, low power consumption and small size for AI, cloud, metaverse, and communications applications
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Memory Chiplet

  • Stealth Mode Products design to disrupt AI/Generative AI processing.
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Hub Chiplet

  • Rich pluggable SoC infrastructure that can help accelerators and CXL solutions reach the market 5x-10x faster with over 10x cost reduction
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