The reference hub for the chiplet ecosystem
Where the chiplet marketplace starts with trust.
New Chiplets
Integrated voltage regulator (IVR) chiplet
- In-package voltage regulation for improved efficiency and performance.
- Reduced board-level complexity and external power components.
- Real-time control and feedback for dynamic system optimization.
High-performance connectivity chiplets
- PCIe and CXL-based connectivity for chiplet and system-level communications.
- High-bandwidth, low-latency data movement across compute, memory, and IO domains.
- Reusable IO architecture that reduces engineering effort across AI designs.
IMDD Tx PICs
- Reliable & qualified
- Supports single or dual input laser to drive all 8-channels
- CMOS-level drive voltage, featuring our patented ultra-low drive voltage design
- > 110 GHz electro-optic bandwidth
Near-Packaged Optics (NPO) Chiplet Solution
- CPO/NPO connectivity for GPU/Switch/ASIC with integrated OSPic™ all-optical signal processor
- High capacity, low latency up to 10Tbps for scale out CPO
- From 1.6Tbps to 6.4Tbps NPO in-field serviceability with heterogeneous laser integration
12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- UCIe based Ka/Ku band transceiver
- Wide Bandwidth
- Scalable solution for dense mm-wave radio into single multi-chip modules
New Chiplet-Ready IP
Ncore Multi-Die Interconnect IP
- Scale Performance with Multi-Die Coherency
- Increase Bandwidth and Reduce Latency
- Tune Systems for Flexibility and Design Requirements
eFPGA Chiplet
- Optimized Performance for Advanced Computing
- Reduced Development Risk and Faster Time-to-Market
- MOSAICS-Ready Chiplet Architecture
High Performance Droplet
- High-Performance Analog Front-Ends (AFEs): Essential for data acquisition and signal processing in various applications.
- High-Speed Interfaces: Facilitating seamless communication between solutions. Omni Design supports various standards, including JESD204 and PCIe.
- Custom Solutions: Omni Design can tailor SoC solutions to meet specific customer requirements.
12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- UCIe based Ka/Ku band transceiver
- Wide Bandwidth
- Scalable solution for dense mm-wave radio into single multi-chip modules
UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
- 2T2R chiplet configuration
- 160/175-GSa/s sample rate
- 7-bit resolution
100G optical I/O chiplets
- RANOVUS®’ Odin® optical I/O cores set industry benchmarks for high bandwidth, low power consumption and small size for AI, cloud, metaverse, and communications applications
Insights
Ecosystem Highlights
EdgeCortix 推出 RAIDEN：专为物理 AI 打造的高能效、可扩展 AI 小芯片平台
2026-09-24T05:26:00+00:00
Arteris 加速行业向 Multi-Die 芯粒架构转型
2026-09-15T13:18:00+00:00
合见工软UCIe芯粒互联 IP助力东方算芯 3D 算力芯片开发面世，打通关键互联路径
2026-10-14T13:33:46+00:00
Credo在开放计算项目(OCP)框架内贡献OmniConnect Scale-In互连方案，破解AI推理"内存墙"难题
2026-08-10T13:06:00+00:00
Expert Perspectives
破局 AI 算力困局：3D-IC 技术架构的颠覆性变革
October 14, 2026
Chiplet将颠覆两巨头？
January 15, 2024
Recent Updates
Chiplet-Based Chips
EdgeCortix 推出 RAIDEN：专为物理 AI 打造的高能效、可扩展 AI 小芯片平台
2026-09-24T05:26:00+00:00
Interconnects & Integration
拓展芯片集成尺寸边界 盛合晶微发布3.3倍硅基2.5D封装技术
2026-10-14T13:33:46+00:00
Chiplet-Ready IP
Arteris 加速行业向 Multi-Die 芯粒架构转型
2026-09-15T13:18:00+00:00
Business & Deals
EdgeCortix与Kawasaki Heavy Industries签署价值数百万美元的多年期协议，以推进下一代AI赋能型空中防御系统的发展
2026-09-08T07:40:00+00:00
Chiplet-Ready IP
合见工软UCIe芯粒互联 IP助力东方算芯 3D 算力芯片开发面世，打通关键互联路径
2026-10-14T13:33:46+00:00
Standards & Research
Credo在开放计算项目(OCP)框架内贡献OmniConnect Scale-In互连方案，破解AI推理"内存墙"难题
2026-08-10T13:06:00+00:00