The NoC In 3D Space
The network on chip has become essential for complex designs, but it needs to evolve to support 3D designs and enable the integration of chiplets.
By Brian Bailey, SemiEngineering
A network on chip (NoC) has become an essential piece of technology that enables the complexity of chips to keep growing, but when designs go 3D, or when third-party chiplets become pervasive, it’s not clear how NoCs will evolve or what the impact will be on chiplet architectures.
A NoC enables data to move between heterogeneous computing elements, while at the same time minimizing the resources required to connect them. Tradeoffs can be made about the topology of a NoC, the resources consumed, and the latency associated with traffic for a defined bandwidth. A NoC also can help keeping data coherent between distributed computing elements.
To read the full article, click here
Related Chiplet
- Direct Chiplet Interface
- HBM3e Advanced-packaging chiplet for all workloads
- UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
- UCIe based 8-bit 48-Gsps Transceiver
- UCIe based 12-bit 12-Gsps Transceiver
Related News
- TSMC Announces Breakthrough Set to Redefine the Future of 3D IC
- UMC Launches W2W 3D IC Project with Partners, Targeting Growth in Edge AI
- CEA Combines 3D Integration Technologies & Many-Core Architectures to Enable High-Performance Processors That Will Power Exascale Computing
- Synopsys looks to AI, 3D die for trillion transistor designs
Latest News
- Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
- Numem Overcomes AI Performance Barriers with Next-Gen Memory Solutions, Highlights Innovations at Chiplet Summit
- Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
- YorChip announces patent-pending Universal PHY for Open Chiplets