How Kandou has been getting ready to unlock AI from day one
There’s no bigger question facing the tech sector today than how to scale AI. Kandou’s chiplet designs are providing part of the answer, assisting the biggest memory users like hyperscalers with the jump in memory bandwidth and capacity they require. But those solutions are based on a core vision that…
But those solutions are based on a core vision that predates not just the AI challenge but many of the other big developments that have shaped chip design in the last ten years. Here’s how that groundwork was laid, and how unique design principles and unique manufacturing methods are now primed to unlock the next chapter in AI and Deep Learning.
In the beginning
As complicated as technology – and life – were in 2011, it was a simpler time. Kandou was founded before so many disruptive events. The pandemic was unimaginable, as was Britain’s entirely new trading relationships with Europe and the rest of the world, the war in Ukraine, and countless other changes that have shaken up global infrastructure. Siri, the first virtual assistant, was only just being launched.
Then, just as now, mathematics was the guiding principle behind the Kandou methodology. It provided the foundations of our earliest SerDes designs, and the pursuit of mathematical perfection – purer, simpler solutions to connectivity problems. It led to the development of the key ingredient in Kandou products: ChordTM Signaling.
And it’s this that has paved the way for a new era of AI scaling. So what is it?
Chord Signaling: the secret ingredient
Chip connections have historically used multiple wires – if there’s only one then throughput saturates bandwidth right away. Conceived just prior to Kandou’s launch in 2010, with what would become the company’s signature mathematical perfection, Chord Signaling provided an entirely new way of coordinating traffic across these connected wires to combat noise more effectively. Increasing the signal to noise ratio in turn increased power efficiency and transmission speed. So you can have more wires and improve pin efficiency without changing the existing differential signalling-based architecture at all. Voilà.
Chord Signaling made it possible to begin realising Kandou’s long-term vision for chiplets. Instead of a traditional monolithic IC, work is divided across smaller, function-specific chiplets that are then interconnected to behave as a single IC. This allows for a much more versatile and scalable approach with far simpler testing requirements. (You can read more about how chiplets came about and Kandou’s solutions in our previous blog here.) An open industry standard for an interconnect, the Universal Chiplet Interconnect ExpressTM, or UCIe, does exist but Kandou’s GlasswingTM is at present more reliable and expansive in design options.
That reliability is entirely down to Glasswing’s superior signal integrity and simple implementation. A die-to-die chiplet model has major commercial advantages, one that early adopters like Marvell Technology Group could see right away, accelerating their time to market considerably. But it also allows users to implement more complex chiplet and MCM structures. And it’s this flexibility that those working with very complex processing and memory networks in ML and AI are asking for.
Related Chiplet
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- UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
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- UCIe based 12-bit 12-Gsps Transceiver
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