Weaving State-of-the-Art Chiplet and SoC Fabrics
By Max Maxfield, eeJournal
Are you familiar with a bird called the baya weaver (Ploceus philippinus)? These little beauties are to be found across the Indian subcontinent and Southeast Asia. Baya weavers are renowned for weaving unique and intricate hinging nests from different materials. These nests are robust and safe while also being extremely lightweight and efficient.
The reason I mention this here is that I was just chatting with Nadan Nayampally, who is the Chief Commercial Officer at Baya Systems. Just a few weeks ago as I pen these words, the folks at Baya Systems emerged from stealth mode. They picked the baya weaver as their namesake because their mission in life is to weave state-of-the-art chiplet and system-on-chip (SoC) fabrics. Baya’s software-driven IP technology portfolio is designed to accelerate both complex single-die SoC and multi-die system designs.
Nadan and I commenced our chat by considering todays challenges, the first of which is growing complexity in silicon (single-die SoCs are complicated enough, now we are moving to chiplet-based multi-die systems), software (scaling it across heterogenous systems), and coherency (maintaining cache coherency across chiplets and clusters). There’s also the fact that performance “guarantees” (data bandwidths, latencies, quality of service) are becoming critical across processors, memory, caches, and fabric. Then there’s the fact that costs are becoming prohibitive (silicon, power, packaging), and market windows are shrinking (faster time-to-market is required along with faster paths to scaling and to custom SKUs).
To read the full article, click here
Related Chiplet
- Direct Chiplet Interface
- HBM3e Advanced-packaging chiplet for all workloads
- UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
- UCIe based 8-bit 48-Gsps Transceiver
- UCIe based 12-bit 12-Gsps Transceiver
Related News
- BOS and Tenstorrent Unveil Eagle-N, Industry’s First Automotive AI Accelerator Chiplet SoC
- Silicon Catalyst at the Chiplet Summit: Presentation, Panel and Exhibition
- Tenstorrent Selects Blue Cheetah Chiplet Interconnect IP For Its AI and RISC-V Solutions
- ESD Alliance and Silicon Assurance Chiplet Security Webinar Set for March 14
Latest News
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- Silicon Box welcomes European Commission approval of €1.3 billion Italian State aid measure to support new advanced packaging facility in Novara
- Fraunhofer IMS Takes a Key Role in Establishing the APECS Pilot Line
- EdgeCortix Joins AI-RAN Alliance to Accelerate the Integration of AI and Next-gen RAN Infrastructure
- Cadence Rolls Out System Chiplet to Reorganize the SoC