How the Worlds of Chiplets and Packaging Intertwine
By Majeed Ahmad, EETimes (September 26, 2023)
Chiplets mark a new era of semiconductor innovation, and packaging is an intrinsic part of this ambitious design undertaking. However, while chiplet and packaging technologies work hand in hand to redefine the possibilities of chip integration, this technological tie-up isn’t that simple and straightforward.
In chip packaging, the bare chip die is encapsulated in a supporting case with electrical contacts. The case protects the bare die from physical harm and corrosion and connects the chip to a PCB. This form of chip packaging has existed for decades.
Related Chiplet
- UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
- UCIe based 8-bit 48-Gsps Transceiver
- UCIe based 12-bit 12-Gsps Transceiver
- 400G Transmitter Chiplet for 400G, 800G and 1.6T Pluggable Transceivers
- FPGA Chiplets with 40K -600K LUTS
Related News
- Tenstorrent Partners with LG to Build AI and RISC-V Chiplets for Smart TVs of the Future
- Alphawave Semi to Reveal Ecosystem and Key Architectures Unlocking Generative AI Potential at EE Times' "Chiplets: Building the Future of SoCs" Seminar
- SEMI and UCLA Offer Guide to Facilitate Onshoring Advanced Packaging Facilities in the United States
- JEDEC and Open Compute Project Foundation Pave the Way for a New Era of Chiplet Innovation
Latest News
- NAPMP announces chiplets R&D area
- Tenstorrent Expands Deployment of Arteris’ Network-on-Chip IP to Next-Generation of Chiplet-Based AI Solutions
- Arm's Data Center Advances: Chiplets, Efficiency & AI Integration
- Chiplets Make Progress Using Interconnects As Glue
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government’s Advanced Research + Invention Agency