The Age of Chiplets is Upon Us
The idea of chiplets is simple: develop the best semiconductors for the needed functions using the most proper manufacturing process. Then combine an assortment of chiplets on a multi-die package, and voila! A lower-cost approach to advanced semiconductors.
The concept also implies using pre-existing semiconductor components for standard functions and focusing new design efforts on the specific functionality needed for the target market or use case. The package can be less costly since design teams can use the most appropriate manufacturing technology for a particular function. For example, many I/O functions do not need, nor benefit from, advanced process nodes and can be manufactured in older, less expensive geometries.
This article examines two recently unveiled enabling technologies: a system chiplet from Cadence Design and Arm Holdings and new interconnect technologies from Intel that provide the glue needed to assemble the puzzle into a compelling solution. We will also examine the benefits of chiplet-based designs and some reasons why they may not make sense. For example, Nvidia does not use chiplets—at least not yet. We explore why that is the case.
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Related Chiplet
- Direct Chiplet Interface
- HBM3e Advanced-packaging chiplet for all workloads
- UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
- UCIe based 8-bit 48-Gsps Transceiver
- UCIe based 12-bit 12-Gsps Transceiver
Related Blogs
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- Scaling AI Data Centers: The Role of Chiplets and Connectivity
- The Future of Chiplet Reliability
- Prototyping Chiplets from the Desktop!