MCMComm: Hardware-Software Co-Optimization for End-to-End Communication in Multi-Chip-Modules
By Ritik Raj, Shengjie Lin, William Won and Tushar Krishna
Georgia Institute of Technology, GA, USA
Increasing AI computing demands and slowing transistor scaling have led to the advent of Multi-Chip-Module (MCMs) based accelerators. MCMs enable cost-effective scalability, higher yield, and modular reuse by partitioning large chips into smaller chiplets. However, MCMs come at an increased communication cost, which requires critical analysis and optimization. This paper makes three main contributions: (i) an end-to-end, off-chip congestion-aware and packaging-adaptive analytical framework for detailed analysis, (ii) hardware software co-optimization incorporating diagonal links, on-chip redistribution, and non-uniform workload partitioning to optimize the framework, and (iii) using metaheuristics (genetic algorithms, GA) and mixed integer quadratic programming (MIQP) to solve the optimized framework. Experimental results demonstrate significant performance improvements for CNNs and Vision Transformers, showcasing up to 1.58x and 2.7x EdP (Energy delay Product) improvement using GA and MIQP, respectively.
To read the full article, click here
Related Chiplet
- Bridglets
- Automotive AI Accelerator
- Direct Chiplet Interface
- HBM3e Advanced-packaging chiplet for all workloads
- UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
Related Technical Papers
- What’s Next for Multi-Die Systems in 2024?
- A Heterogeneous Chiplet Architecture for Accelerating End-to-End Transformer Models
- The chiplet universe is coming: What’s in it for you?
- Dual-Stripline Configuration for Efficient Routing in Chiplet Interconnects
Latest Technical Papers
- MCMComm: Hardware-Software Co-Optimization for End-to-End Communication in Multi-Chip-Modules
- FoldedHexaTorus: An Inter-Chiplet Interconnect Topology for Chiplet-based Systems using Organic and Glass Substrates
- ChipletQuake: On-die Digital Impedance Sensing for Chiplet and Interposer Verification
- ATPlace2.5D: Analytical Thermal-Aware Chiplet Placement Framework for Large-Scale 2.5D-IC
- Advanced Chiplet Placement and Routing Optimization considering Signal Integrity