2D materials-based 3D integration for neuromorphic hardware
By Seung Ju Kim, Hyeon-Ji Lee, Chul-Ho Lee & Ho Won Jang
Abstract
Neuromorphic hardware enables energy-efficient computing, which is essential for a sustainable system. Recently, significant progress has been reported in neuromorphic hardware based on two-dimensional materials. However, traditional planar-integrated architectures still suffer from high energy consumption. This review systematically explores recent advances in the three-dimensional integration of two-dimensional material-based neuromorphic hardware to address these challenges. The materials, process, device physics, array, and integration levels are discussed, highlighting challenges and perspectives.
Introduction
As technology advances, there is greater demand for computing resources, which consume vast amounts of energy. Developing efficient computing technologies is critical to achieving a sustainable system. Efficient computing requires innovation at the level of semiconductor technology and computing architecture. As complementary metal-oxide semiconductor (CMOS) technology approaches the limits set by Moore’s Law, researchers have been exploring alternatives to continue scaling down. Currently, these efforts are focused on overcoming scaling limitations at the device design level. This led to the development of advanced transistor architectures and processes such as fin field-effect transistors(fin-FETs), gate-all-around FETs, and nanosheet FETs, which enabled increased device density and performance. However, the miniaturization of CMOS process nodes still faces physical limitations. As the channel length of transistors shrinks to 3 nm and below, the semiconductor industry is exploring new ways to go beyond Moore’s Law with a new computing paradigm, called neuromorphic computing6.
Neuromorphic computing has emerged as an alternative to traditional computing systems. A critical issue in conventional computing systems is the bottleneck between memory and processors. The bottleneck hinders the achievement of sufficient processing speeds when exchanging vast amounts of data between memory and processors. Inspired by the human brain, neuromorphic computing integrates memory and processing units to improve speed and energy efficiency. It has been proposed that computing be memory-centric, rather than the traditional processor-centric. Thus, much more efficient computing methods, such as processing in-memory or near-memory, can be used to enable “more than Moore”. This paradigm shift addresses the limitations of conventional computers and offers promising solutions for high-performance, low-power computing.
However, it requires a completely different design and packaging approach than traditional semiconductor design and packaging. In traditional planar two-dimensional (2D) packaging design, where functional layers are connected horizontally, the interconnections between these layers are separated by distances ranging from micrometers to millimeters. This results in parasitic resistance and capacitance, which can lead to issues such as signal delay and increased power consumption. In contrast, by stacking functional layers vertically through three-dimensional (3D) integration, the interconnect length between layers can be reduced to tens or hundreds of nanometers. This reduction enables wider bandwidths, minimizes delays, and lowers power consumption, all while significantly increasing integration density. Therefore, 3D integration has become essential to further enhance the integration density and performance of neuromorphic computing hardware.
To make this possible, the semiconductor industry has continued to research advanced packaging technologies such as through-silicon vias, wire bonding, flip-chip packaging, wafer-level packaging, fan-out, micro-bumping, and so on. However, they face significant challenges in implementing them with existing CMOS material technologies. The bulk nature of silicon hinders reducing channel thickness below 4 nm while maintaining structural integrity in multi-layer architectures. The presence of dangling bonds on the silicon interface introduces the defects, inducing increased leakage current and impaired device performance. These surface states are particularly significant in 3D integration, where multiple interfaces exist. Overcoming these challenges requires materials that can withstand high internal stresses without failure. In addition, new material technologies and device structures beyond traditional CMOS material technologies are required to realize more suitable neuromorphic computing hardware.
Two-dimensional (2D) materials have emerged as highly promising candidates, offering not only exceptional resistance to internal stress but also a range of other critical advantages. Because 2D materials are atomically thin, they offer a unique solution for neuromorphic computing hardware. Their intrinsic properties, such as a dangling bond-free structure, high mechanical strength, and superior crystallinity, make them exceptionally well-suited for 3D integration. They are also inherently flexible and maintain their electronic properties even at atomic scales, making them ideal for dense and efficient stacking in 3D architectures.
Integrating 2D materials into 3D architectures holds revolutionary potential for neuromorphic computing hardware. The unique properties of 2D materials, including their high surface area, tunable electronic characteristics, and compatibility with flexible substrates, are key to creating the dense, efficient, and scalable networks required for next-generation neuromorphic computing. This integration can dramatically enhance both the performance and energy efficiency of neuromorphic systems, positioning them as a strong alternative to conventional computing architectures.
This review explores recent advances in the integration of 2D material-based neuromorphic hardware into 3D structures. First, the fundamental principles of neuromorphic computing hardware are covered, and the mechanisms underlying the operation of the hardware are categorized. In addition, recent progress in the integration of 2D materials into 3D structures is systematically reviewed in terms of materials, devices, arrays, and 3D integration. Finally, the challenges facing current 2D-based neuromorphic hardware technologies integrated into 3D structures will be discussed, and some perspectives for achieving industrial-level implementations will be proposed.
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