EU funding boosts Europe's semiconductor production – VTT develops packaging methods

February 18, 2025 -- The Public Authorities Board of the Chips Joint Undertaking (EU Chips Act) has awarded funding to the APECS pilot line project. The project is part of a major effort to develop European semiconductor production. The project focuses on developing and providing new packaging and integration solutions for the industry. VTT is also involved in the following pilot line projects aiming at semiconductor production: FAMES, NanoIC and PIXEurope.

The APECS (Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems) pilot line, as part of the EU Chips Act programme, will promote European semiconductor manufacturing capability and chip innovation. The pilot line will focus on the development of reliable packaging solutions for microchips and innovative combinations of semiconductor materials and technologies, as well as chiplet integration. As its name suggests, the APECS pilot line will provide technologies to help others develop technology and innovation and will be coordinated by Fraunhofer. 

"In the APECS project, VTT will focus in particular on the radio frequency technologies required for the 6G network and on the development and demonstration of optical microsystems and chip packaging methods," says Tauno Vähä-Heikkilä, Vice President, Microelectronics and Quantum Technologies at VTT. 

VTT is involved in other European pilot projects: The FAMES and NanoIC pilot lines are run by CEA-Leti of France and imec of Belgium. In October, we published news about our collaboration on the EU-funded CEA-Let and imec FAMES and NanoIC pilot projects. Through the pilot lines, Finland is strongly involved in the European semiconductor ecosystem. The pilot lines provide services to companies to develop products and scale them up for production. Technologies under development include the latest transistor and RF technologies, new memory technologies and packaging technologies.

VTT's activities in the European APECS, FAMES and NanoIC pilot lines will be located in Kvanttinova for which the Finnish government has granted EUR 79 million in funding to build shared pilot lines. Kvanttinova is an RDI Hub in microelectronics and quantum technology, jointly developed by VTT, Aalto University and the City of Espoo. VTT's shared-use cleanroom enables domestic companies to develop and pilot microelectronics components, systems and innovation and scale them up for production. The first semiconductor processes in Finland will start up towards the end of 2026. 

Furthermore, the European Commission has announced the creation of PIXEurope, a new pilot line for photonic chips. It is coordinated by ICFO, the Institute of Photonic Sciences in Barcelona. VTT is among the participants of the PIXEurope consortium. Financial and technical negotiations are currently underway. VTT develops low-loss thick-SOI integrated photonics for the pilot line's offering.

The EUR 29 million funding from the EU and the Finnish government for the APECS pilot line will focus on VTT's shared-use cleanroom facilities and the development of semiconductor manufacturing processes. 

"Taken together, these four pilot lines, APECS, FAMES, NanoIC and PIXEurope, will support the growth of the Finnish and European semiconductor industry and help Finnish industry to connect to European value chains," says VTT's Research Manager Pekka Pursula.

The recent funding decisions made through the Chips Act and the equipment acquisitions enabled by them will support the strong areas of expertise of the Finnish semiconductor industry, in particular new materials, ALD technology for memory applications and RF technology

 

About APECS pilot line

Under the EU Chips Act, the Research Fab Microelectronics Germany (FMD) will implement APECS – a comprehensive pilot line to support resilient and trusted heterogeneous systems over the coming years. The APECS pilot line will enhance the innovative capacity of European industries across various sectors and serve as a crucial foundation for Europe’s technological resilience. Through System Technology Co-Optimization (STCO), APECS introduces new functionalities and offers seamless design-to-production capabilities, facilitating the transition of research breakthroughs into scalable manufacturing solutions. As a single point of access, APECS serves stakeholders across nearly all industry sectors, including large enterprises, SMEs, and start-ups. The APECS pilot line brings together the competences, infrastructure, and know-how of ten partners from eight European countries. In Germany twelve institutes from the Fraunhofer-Gesellschaft and two institutes from the Leibniz Association are participating in APECS. APECS is coordinated by the Fraunhofer-Gesellschaft and implemented by the Research Fab Microelectronics Germany (FMD), a cooperation of the Fraunhofer Group for Microelectronics with the Leibniz institutes IHP and FBH. APECS is co-funded by the Chips Joint Undertaking and national funding authorities of Austria, Belgium, Finland, France, Germany, Greece, Portugal, Spain, through the Chips for Europe Initiative.