US-Made ‘Chiplet’ Tech Emerges as Core China Chip Strategy
By Jim Pollard, AsiaFinancial (July 13, 2023)
Patents for small computer chips, developed by a struggling US company, were sold to China two years ago, in a move some say highlights a need to reform the government watchdog CFIUS
Patents for ‘chiplets’ – small computer chips – developed by a struggling Silicon Valley company in the United States, were sold to China in 2021.
But questions about how this happened, and whether the Committee on Foreign Investment in the United States (CFIUS), could, or should, have done more to retain ownership of this technology, are now being asked because chipset technology is booming in China.
The sale of startup zGlue’s patents in 2021 was unremarkable except for the technology it owned, designed to cut the time and cost for making chips, showed up 13 months later in the patent portfolio of Chipuller, a startup in China’s southern tech hub Shenzhen.
To read the full article, click here
Related Chiplet
- Interconnect Chiplet
- 12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- Bridglets
- Automotive AI Accelerator
- Direct Chiplet Interface
Related News
- Fraunhofer IZM is powering the evolution of chiplet technologies as part of the APECS pilot line
- Chiplet Ecosystem Slowly Emerges
- Advanced packaging blurs line between monolithic chip and packaged assembly of heterogeneous chips: NAPMP NoI
- Assistant professor in electrical and computer engineering revolutionizes chiplet designs, earns NSF CAREER Award
Latest News
- Celestial AI Introduces Photonic Fabric™ Module - World’s First SoC with In-Die Optical Interconnect, Ushering in a New Era of Interconnects
- Amkor Announces New Site for U.S. Semiconductor Advanced Packaging and Test Facility
- Arteris Joins UALink Consortium to Accelerate High-Performance AI Networks Scale Up
- Athos Silicon Chief mSoC™ Architect Francois Piednoel to Present the IEEE World Technology Summit 2025 in Berlin
- Marvell Unveils Industry’s First 64 Gbps/wire Bi-Directional Die-to-Die Interface IP in 2nm to Power Next Generation XPUs