Safety architecture boosts automotive GPU for chiplets
By Nick Flaherty, eeNews Europe (September 17, 2024)
Imagination Technologies has launched its latest automotive multicore GPU IP for chiplet designs with a new safety architecture.
The DXS is a scalable and flexible GPU IP designed by Imagination to process graphics and compute workloads in cockpit, infotainment and advanced driver assistance systems.
The design eliminates the overhead of achieving ASIL-B functional safety using a Distributed Safety Mechanisms that has a near-zero impact on GPU performance and minimal area cost, estimated at just 10%.
It does this by taking advantage of the inherent parallelism of today’s processors and the fact that no thread is ever fully utilised. A patented mechanism combines these threads into pairs and injects safety tests in idle moments to identify faults within the timeframe set by the ASIL standard.
To read the full article, click here
Related Chiplet
- Direct Chiplet Interface
- HBM3e Advanced-packaging chiplet for all workloads
- UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
- UCIe based 8-bit 48-Gsps Transceiver
- UCIe based 12-bit 12-Gsps Transceiver
Related News
- Cadence Collaborates with Arm to Jumpstart the Automotive Chiplet Ecosystem
- Cadence, Siemens back ARM automotive chiplet push
- Jumpstarting The Automotive Chiplet Ecosystem
- TSMC plans automotive chiplet process for 2025
Latest News
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- Silicon Box welcomes European Commission approval of €1.3 billion Italian State aid measure to support new advanced packaging facility in Novara
- Fraunhofer IMS Takes a Key Role in Establishing the APECS Pilot Line
- EdgeCortix Joins AI-RAN Alliance to Accelerate the Integration of AI and Next-gen RAN Infrastructure
- Cadence Rolls Out System Chiplet to Reorganize the SoC