EV Group Achieves Breakthrough in Hybrid Bonding Overlay Control for Chiplet Integration
2025-09-08 13:40:00
Featured News
Asicland Marks First Anniversary of ‘Taiwan R&D Center’
2025-09-08 11:36:00
Sarcina pioneers next-generation UCIe-A/S chiplet interconnects for AI systems
2025-09-08 06:05:00
Ayar Labs and Alchip to Scale AI Infrastructure with Co-Packaged Optics
2025-09-08 05:55:00
Alchip 3DIC Test Chip Tape Out Validates Ecosystem Readiness
2025-09-04 15:23:00
Recent News
EV Group Achieves Breakthrough in Hybrid Bonding Overlay Control for Chiplet Integration
2025-09-08 13:40:00
Equipment
Asicland Marks First Anniversary of ‘Taiwan R&D Center’
2025-09-08 11:36:00
Business
Sarcina pioneers next-generation UCIe-A/S chiplet interconnects for AI systems
2025-09-08 06:05:00
Chiplet
Ayar Labs and Alchip to Scale AI Infrastructure with Co-Packaged Optics
2025-09-08 05:55:00
Business
Alchip 3DIC Test Chip Tape Out Validates Ecosystem Readiness
2025-09-04 15:23:00
Chiplet
BOS Semiconductors Introduces the Industry’s First Chiplet-Based NPU Samples, Expanding Supply to Global Automotive OEMs
2025-09-04 06:04:00
Chiplet-Based Chip
Arteris Builds on Growth With Product Launches, Strategic Licensing Agreements
2025-09-03 13:26:00
Business
Avicena Names Marco Chisari as New CEO
2025-09-03 12:05:00
People
Resonac Launches 27-Member "JOINT3" Consortium to Develop Next-Generation Semiconductor Packaging
2025-09-03 09:43:00
Advanced Packaging
GUC Joins NVIDIA NVLink Fusion Ecosystem to Drive Seamless XPU Integration
2025-09-03 05:47:00
Business
JCET’s CPO Solution Accelerates Efficiency and Bandwidth Breakthroughs in Data Interconnect
2025-09-01 13:42:00
Photonics
Socionext Expands 3DIC Support with Advanced 3D Die Stacking and 5.5D in Packaging Portfolio
2025-09-01 09:14:00
Chiplet
Rebellions Debuts REBEL-Quad at Hot Chips 2025, breaking AI’s Energy Tax with High-Performance Chiplet Innovation
2025-09-01 06:11:00
Chiplet-Based Chip
Celestial AI Introduces Photonic Fabric™ Module - World’s First SoC with In-Die Optical Interconnect, Ushering in a New Era of Interconnects
2025-08-29 13:28:00
Photonics
Amkor Announces New Site for U.S. Semiconductor Advanced Packaging and Test Facility
2025-08-29 05:33:00
Advanced Packaging
Arteris Joins UALink Consortium to Accelerate High-Performance AI Networks Scale Up
2025-08-28 11:33:00
Standards
Athos Silicon Chief mSoC™ Architect Francois Piednoel to Present the IEEE World Technology Summit 2025 in Berlin
2025-08-27 06:37:00
Event
Marvell Unveils Industry’s First 64 Gbps/wire Bi-Directional Die-to-Die Interface IP in 2nm to Power Next Generation XPUs
2025-08-26 13:25:00
IP
Xscape Photonics and Tower Semiconductor Unveil the Industry’s First Optically Pumped On-Chip Multi-Wavelength Laser Platform for AI Datacenter Fabrics
2025-08-25 11:34:00
Photonics
Electrical Engineering and Computer Science Department Chair Alex K. Jones and Professor Bryan Kim Receive NSF Grant to Develop Energy-Efficient Chiplets for Data Centers
2025-08-25 05:50:00
Research & Development
EV Group Achieves Breakthrough in Hybrid Bonding Overlay Control for Chiplet Integration
2025-09-08 13:40:00
Equipment
Asicland Marks First Anniversary of ‘Taiwan R&D Center’
2025-09-08 11:36:00
Business
Sarcina pioneers next-generation UCIe-A/S chiplet interconnects for AI systems
2025-09-08 06:05:00
Chiplet
Ayar Labs and Alchip to Scale AI Infrastructure with Co-Packaged Optics
2025-09-08 05:55:00
Business
Alchip 3DIC Test Chip Tape Out Validates Ecosystem Readiness
2025-09-04 15:23:00
Chiplet
BOS Semiconductors Introduces the Industry’s First Chiplet-Based NPU Samples, Expanding Supply to Global Automotive OEMs
2025-09-04 06:04:00
Chiplet-Based Chip
Arteris Builds on Growth With Product Launches, Strategic Licensing Agreements
2025-09-03 13:26:00
Business
Avicena Names Marco Chisari as New CEO
2025-09-03 12:05:00
People
Resonac Launches 27-Member "JOINT3" Consortium to Develop Next-Generation Semiconductor Packaging
2025-09-03 09:43:00
Advanced Packaging
GUC Joins NVIDIA NVLink Fusion Ecosystem to Drive Seamless XPU Integration
2025-09-03 05:47:00
Business
JCET’s CPO Solution Accelerates Efficiency and Bandwidth Breakthroughs in Data Interconnect
2025-09-01 13:42:00
Photonics
Socionext Expands 3DIC Support with Advanced 3D Die Stacking and 5.5D in Packaging Portfolio
2025-09-01 09:14:00
Chiplet
Rebellions Debuts REBEL-Quad at Hot Chips 2025, breaking AI’s Energy Tax with High-Performance Chiplet Innovation
2025-09-01 06:11:00
Chiplet-Based Chip
Celestial AI Introduces Photonic Fabric™ Module - World’s First SoC with In-Die Optical Interconnect, Ushering in a New Era of Interconnects
2025-08-29 13:28:00
Photonics
Amkor Announces New Site for U.S. Semiconductor Advanced Packaging and Test Facility
2025-08-29 05:33:00
Advanced Packaging
Arteris Joins UALink Consortium to Accelerate High-Performance AI Networks Scale Up
2025-08-28 11:33:00
Standards
Athos Silicon Chief mSoC™ Architect Francois Piednoel to Present the IEEE World Technology Summit 2025 in Berlin
2025-08-27 06:37:00
Event
Marvell Unveils Industry’s First 64 Gbps/wire Bi-Directional Die-to-Die Interface IP in 2nm to Power Next Generation XPUs
2025-08-26 13:25:00
IP
Xscape Photonics and Tower Semiconductor Unveil the Industry’s First Optically Pumped On-Chip Multi-Wavelength Laser Platform for AI Datacenter Fabrics
2025-08-25 11:34:00
Photonics
Electrical Engineering and Computer Science Department Chair Alex K. Jones and Professor Bryan Kim Receive NSF Grant to Develop Energy-Efficient Chiplets for Data Centers
2025-08-25 05:50:00
Research & Development