Paving the way for the semiconductor future: The Chiplet Center of Excellence commences operations
Dresden, Germany - August 6, 2024 -- Three Fraunhofer Institutes have launched a forward-looking research initiative in Dresden: the Chiplet Center of Excellence (CCoE). Its purpose is to partner with industry to drive forward the introduction of chiplet technology. Researchers at the CCoE are working on several fronts for the automotive industry, developing the first workflows and methods for electronics design, demonstrator construction, and the evaluation of reliability.
“Chiplets will play a critical role in the global semiconductor industry in the years ahead because this technology offers the greatest freedom possible for customizing the design of electronics systems. This makes it all the more important for European industry to have a coordinated roadmap for the incorporation of chiplets into its own products,” says Andy Heinig, department head at Fraunhofer IIS/EAS and head of the Chiplet Center of Excellence (CCoE). “That’s why it’s essential for companies to be able to assess the feasibility of chiplet-based system solutions early on. For this reason, at the CCoE we take the wide range of requirements and constraints these products have and convert them into practical workflows and new evaluation processes.”
The aim of the CCoE is to do all it can to support the competitiveness and technological sovereignty of strong European industrial sectors. For the first two years, the CCoE will therefore focus on applications in automotive electronics. These efforts will bring together a range of key partners all along the value chain – from car manufacturers to semiconductor companies. The Fraunhofer researchers want to provide these partners with methodological approaches, architectural concepts, reusable basic components, and roadmaps for the development, manufacture, and robust design of chiplets. In addition, the CCoE assesses a variety of chiplet solutions in terms of their performance, cost, and reliability. The research findings will flow into international standards and play a role in shaping a multi-vendor chiplet ecosystem.
What sets the CCoE apart is Fraunhofer’s expansive portfolio in electronics development and manufacture, as well as the close interdisciplinary collaboration with industry. The CCoE is operated by the Dresden-based Engineering of Adaptive Systems EAS division of the Fraunhofer Institute for Integrated Circuits IIS, the Fraunhofer Institute for Reliability and Microintegration IZM and its division All Silicon System Integration Dresden – ASSID as well as the Fraunhofer Institute for Electronic Nano Systems ENAS. Companies interested in participating in the CCoE’s pre-competitive activities and shaping its research agenda have until fall 2024 to sign up. For more information about the CCoE and ways to get in touch, visit www.chiplet-center.fraunhofer.de.
Background: Chiplets
Electronics solutions based on chiplets are the first to allow the integration of various functional units in different technologies on a substrate or into a 3D chip stack. This gives electronics engineers the option of using the manufacturing technology best suited to the case at hand. For example, for certain functionalities, engineers can now concentrate the latest (and expensive) technologies on just a few circuits, instead of having to use them for the entire chip. Today, chiplets are already a cost-effective option for applications produced on a large scale and are used predominantly by US companies in data centers. However, each company applies its own standards. Using chiplets from different sources for product groups with smaller and medium batch sizes, such as for automotive applications, has thus far proved largely unviable.
About Fraunhofer IIS/EAS
The Fraunhofer Institute for Integrated Circuits IIS is a world leader in research on microelectronic and IT system solutions. At the EAS division in Dresden, researchers are working on new design concepts to meet the challenges of the constant miniaturization of semiconductor components and the growing complexity of integrated circuits. EAS also contributes this expertise to the work done at the Chiplet Center of Excellence (CCoE). This aids the development of application-specific design flows, test structures, adapted interface IPs, and new packaging concepts for chiplet solutions. The division is also home to the CCoE general management.
About Fraunhofer IZM
For over 30 years, Fraunhofer IZM has been a world leader in applied research and the development of robust and reliable electronics as well as their system integration at the wafer, chip, and board levels. More than 450 employees develop technology solutions for future challenges such as high-end performance packaging, quantum sensing, hardware security and bioelectronics, sustainable 6G applications, and chiplets. In the Chiplet Center of Excellence, Fraunhofer IZM is responsible for building demonstrators and in particular for providing its expertise in assemblies at the wafer level and on substrates. The institute’s facilities include 200 and 300 mm process lines for 3D wafer-level integration and a 600 mm substrate line.
About Fraunhofer ENAS
Fraunhofer ENAS in Chemnitz is a research and development partner in the field of smart systems for all kinds of applications. What the institute contributes to the CCoE is its extensive expertise in testing and reliability assessment, as well as in solution characterization for integrating electronics and smart systems. To this end, Fraunhofer ENAS develops methods for the virtual testing and prototyping of chiplet components and systems with a view to optimizing the functionality and reliability of chiplet solutions significantly more time- and resource-efficient.
Related Chiplet
- Direct Chiplet Interface
- HBM3e Advanced-packaging chiplet for all workloads
- UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
- UCIe based 8-bit 48-Gsps Transceiver
- UCIe based 12-bit 12-Gsps Transceiver
Related News
- The Emergence of the Chiplet Economy with Alphawave Semi’s Letizia Guiliano
- Tenstorrent RISC-V and Chiplet Technology Selected to Build the Future of AI in Japan
- Getting the Most Out of ATE Test Seconds in the Chiplet Age
- YorChip predicts 2026 will be the year of the chiplet
Latest News
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- Silicon Box welcomes European Commission approval of €1.3 billion Italian State aid measure to support new advanced packaging facility in Novara
- Fraunhofer IMS Takes a Key Role in Establishing the APECS Pilot Line
- EdgeCortix Joins AI-RAN Alliance to Accelerate the Integration of AI and Next-gen RAN Infrastructure
- Cadence Rolls Out System Chiplet to Reorganize the SoC