Enabling Innovative Multi-Vendor Chiplet-Based Designs
September 27, 2024
Chiplet Technical Papers
Cambricon-LLM: A Chiplet-Based Hybrid Architecture for On-Device Inference of 70B LLM
September 26, 2024
Revamping the Semiconductor Industry with Hybrid Bonding
September 23, 2024
How Die Dimensions Challenge Assembly Processes
September 19, 2024
TA3D: Timing-Aware 3D IC Partitioning and Placement by Optimizing the Critical Path
September 12, 2024
An Introduction to Direct RF Sampling in a World Evolving Towards Chiplets – Part 1
September 2, 2024
Small Dies, Big Dreams: Challenges and Opportunities in Chiplet Commoditization
August 30, 2024
Multi-Objective Hardware-Mapping Co-Optimisation for Multi-DNN Workloads on Chiplet-based Accelerators
August 30, 2024
Achieving Better Chiplet Design Signal Integrity with UCIe™
August 26, 2024
Intel and Cadence Collaboration on UCIe: Demonstration of Simulation Interoperability
August 21, 2024
The multiphysics challenges of 3D IC designs
August 12, 2024
NoCs and the transition to multi-die systems using chiplets
August 2, 2024
Architecture-stage EDA Tool VisualSim to Design UCIe-based Multi-die SoC
July 29, 2024
Towards efficient ESD protection strategies for advanced 3D systems-on-chip
July 29, 2024
Hecaton: Training and Finetuning Large Language Models with Scalable Chiplet Systems
July 10, 2024
Occamy: A 432-Core 28.1 DP-GFLOP/s/W 83% FPU Utilization Dual-Chiplet, Dual-HBM2E RISC-V-based Accelerator for Stencil and Sparse Linear Algebra Computations with 8-to-64-bit Floating-Point Support in 12nm FinFET
June 25, 2024
Chiplet-Gym: Optimizing Chiplet-based AI Accelerator Design with Reinforcement Learning
June 19, 2024
Probeless Fault Isolation Capability for 2.5D/3D Chiplet Die-to-Die Interconnect
June 18, 2024
Chiplets on Wheels : Review Paper on holistic chiplet solutions for autonomous vehicles
June 5, 2024
Modeling and Controlling Many-Core HPC Processors: an Alternative to PID and Moving Average Algorithms
June 3, 2024
