Socionext - Chiplet Ecosystem

Socionext announced a collaboration with Arm and TSMC for the development of an innovative power-optimized 32-core CPU chiplet in TSMCʼs 2nm silicon technology, delivering scalable performance for hyperscale data center server, 5/6G infrastructure, DPU and edge-of-network markets.

This advanced CPU chiplet proof-of-concept using Arm® Neoverse™ CSS technology is designed for single or multiple instantiations within a single package, along with IO and application-specific custom chiplets to optimize performance for a variety of end applications.

Leveraging CPU chiplets, and customized application-specific chiplets, multiple target applications can be supported. When new chiplets become available, a cost-effective package level upgrade path can be supported.