China forms its own chiplet standard amid isolation
By Peter Clarke, eeNews Analog (March 27, 2023)
The China Chiplet Industry Alliance has released the ‘Chiplet Interconnection Interface Standard’ known as ACC1.0, according to the Financial Association Press.
The standard defines a high-speed serial port and is focused on optimization based on the domestic packaging and substrate supply chain, with cost and commercial practicality as a key consideration, the report said. The standard was developed by the Cross Information Core Technology Research Institute working with the China Chiplet Industry Alliance, which includes domestic system, IP, and packaging manufacturers.
To read the full article, click here
Related Chiplet
- 12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- Interconnect Chiplet
- Bridglets
- Automotive AI Accelerator
- Direct Chiplet Interface
Related News
- Chiplet Standard Goes 3D
- Keysight Introduces PCIe Designer and Chiplet PHY Designer for Digital Standards-Driven Simulation Workflows
- Optical Chiplet Interconnect Promises to Accelerate Computing Apps
- Alphawave Semi Drives Innovation in Hyperscale AI Accelerators with Advanced I/O Chiplet for Rebellions Inc
Latest News
- Untether AI Enters Into a Strategic Agreement with AMD
- Alphawave Semi Tapes Out Breakthrough 36G UCIe™ IP on TSMC 2nm, Unlocking Foundational AI Platform IP on Nanosheet Processes
- How Secure Are Analog Circuits?
- Sarcina Technology advances photonic package design to address key data center challenges
- Imec demonstrates 16nm pitch Ru lines with record-low resistance obtained using a semi-damascene integration approach