Synopsys looks to AI, 3D die for trillion transistor designs
By Nick Flaherty, eeNews Europe (March 21, 2024)
AI boosting the development of multi-die designs will be key to achieving trillion transistor devices says the CEO of design tool pioneer Synopsys.
“We see three major growth drivers for the industry, said Sassine Ghazi, Ghazi, who took over as CEO of Synopsys from founding CEO Aart de Geus in January this year.
“The rapid acceleration of AI is driving a massive improvement in productivity, not just in our space but in many end markets. Second is the proliferation of silicon. What going to power the AI advancements is the silicon,” he said at this year’s Synopsys User Group (SNUG) meeting which is celebrating its 35th anniversary.
To read the full article, click here
Related Chiplet
- 12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- Interconnect Chiplet
- Bridglets
- Automotive AI Accelerator
- Direct Chiplet Interface
Related News
- Synopsys and TSMC Pave the Path for Trillion-Transistor AI and Multi-Die Chip Design
- Ansys Enables 3D Multiphysics Visualization of Next-Generation 3D-IC Designs with NVIDIA Omniverse
- Synopsys Powers World’s Fastest UCIe-Based Multi-Die Designs with New IP Operating at 40 Gbps
- SEMIFIVE Collaborates with Synopsys to Develop Advanced Chiplet Platform for High-Performance Multi-Die Designs
Latest News
- Untether AI Enters Into a Strategic Agreement with AMD
- Alphawave Semi Tapes Out Breakthrough 36G UCIe™ IP on TSMC 2nm, Unlocking Foundational AI Platform IP on Nanosheet Processes
- How Secure Are Analog Circuits?
- Sarcina Technology advances photonic package design to address key data center challenges
- Imec demonstrates 16nm pitch Ru lines with record-low resistance obtained using a semi-damascene integration approach